Nano102_112 Series BSP  V3.03.002
The Board Support Package for Nano102_112 Series
Macros
SC Exported Constants

Macros

#define SC_INTERFACE_NUM   2
 
#define SC_PIN_STATE_HIGH   1
 
#define SC_PIN_STATE_LOW   0
 
#define SC_PIN_STATE_IGNORE   0xFFFFFFFF
 
#define SC_CLK_ON   1
 
#define SC_CLK_OFF   0
 
#define SC_TMR_MODE_0   (0ul << SC_TMR0_MODE_Pos)
 
#define SC_TMR_MODE_1   (1ul << SC_TMR0_MODE_Pos)
 
#define SC_TMR_MODE_2   (2ul << SC_TMR0_MODE_Pos)
 
#define SC_TMR_MODE_3   (3ul << SC_TMR0_MODE_Pos)
 
#define SC_TMR_MODE_4   (4ul << SC_TMR0_MODE_Pos)
 
#define SC_TMR_MODE_5   (5ul << SC_TMR0_MODE_Pos)
 
#define SC_TMR_MODE_6   (6ul << SC_TMR0_MODE_Pos)
 
#define SC_TMR_MODE_7   (7ul << SC_TMR0_MODE_Pos)
 
#define SC_TMR_MODE_8   (8ul << SC_TMR0_MODE_Pos)
 
#define SC_TMR_MODE_F   (0xF << SC_TMR0_MODE_Pos)
 

Detailed Description

Macro Definition Documentation

◆ SC_CLK_OFF

#define SC_CLK_OFF   0

Smartcard clock off

Definition at line 37 of file sc.h.

◆ SC_CLK_ON

#define SC_CLK_ON   1

Smartcard clock on

Definition at line 36 of file sc.h.

◆ SC_INTERFACE_NUM

#define SC_INTERFACE_NUM   2

Smartcard interface numbers

Definition at line 32 of file sc.h.

◆ SC_PIN_STATE_HIGH

#define SC_PIN_STATE_HIGH   1

Smartcard pin status high

Definition at line 33 of file sc.h.

◆ SC_PIN_STATE_IGNORE

#define SC_PIN_STATE_IGNORE   0xFFFFFFFF

Ignore pin status

Definition at line 35 of file sc.h.

◆ SC_PIN_STATE_LOW

#define SC_PIN_STATE_LOW   0

Smartcard pin status low

Definition at line 34 of file sc.h.

◆ SC_TMR_MODE_0

#define SC_TMR_MODE_0   (0ul << SC_TMR0_MODE_Pos)

Timer Operation Mode 0, down count

Definition at line 39 of file sc.h.

◆ SC_TMR_MODE_1

#define SC_TMR_MODE_1   (1ul << SC_TMR0_MODE_Pos)

Timer Operation Mode 1, down count, start after detect start bit

Definition at line 40 of file sc.h.

◆ SC_TMR_MODE_2

#define SC_TMR_MODE_2   (2ul << SC_TMR0_MODE_Pos)

Timer Operation Mode 2, down count, start after receive start bit

Definition at line 41 of file sc.h.

◆ SC_TMR_MODE_3

#define SC_TMR_MODE_3   (3ul << SC_TMR0_MODE_Pos)

Timer Operation Mode 3, down count, use for activation, only timer 0 support this mode

Definition at line 42 of file sc.h.

◆ SC_TMR_MODE_4

#define SC_TMR_MODE_4   (4ul << SC_TMR0_MODE_Pos)

Timer Operation Mode 4, down count with reload after timeout

Definition at line 43 of file sc.h.

◆ SC_TMR_MODE_5

#define SC_TMR_MODE_5   (5ul << SC_TMR0_MODE_Pos)

Timer Operation Mode 5, down count, start after detect start bit, reload after timeout

Definition at line 44 of file sc.h.

◆ SC_TMR_MODE_6

#define SC_TMR_MODE_6   (6ul << SC_TMR0_MODE_Pos)

Timer Operation Mode 6, down count, start after receive start bit, reload after timeout

Definition at line 45 of file sc.h.

◆ SC_TMR_MODE_7

#define SC_TMR_MODE_7   (7ul << SC_TMR0_MODE_Pos)

Timer Operation Mode 7, down count, start and reload after detect start bit

Definition at line 46 of file sc.h.

◆ SC_TMR_MODE_8

#define SC_TMR_MODE_8   (8ul << SC_TMR0_MODE_Pos)

Timer Operation Mode 8, up count

Definition at line 47 of file sc.h.

◆ SC_TMR_MODE_F

#define SC_TMR_MODE_F   (0xF << SC_TMR0_MODE_Pos)

Timer Operation Mode 15, down count, reload after detect start bit

Definition at line 48 of file sc.h.