Airoha M0 BLE API  1.0.5.4
hci_airoha.h
1 /******************************************************************************
2 Copyright (c) Airoha 2016 - All rights reserved
3 
4 FILE NAME
5  hci_airoha.h
6 DESCRIPTION
7 NOTES
8 ********************************************************************************/
9 #ifndef _HCI_AIROHA_H_
10 #define _HCI_AIROHA_H_
11 
12 #include "hci.h"
13 #include "hci_constant.h"
14 
17 // Type Defintions /////////////////////////////////////////////////////////////
19 typedef uint8_t SYS_MODE;
20 #define SYS_MODE_DEVICE ((SYS_MODE)1 << 0)
21 #define SYS_MODE_CONTROLLER ((SYS_MODE)1 << 1)
22 #define SYS_MODE_ENGINEERING ((SYS_MODE)1 << 2)
23 #define SYS_MODE_AIR_UPDATE ((SYS_MODE)1 << 3)
24 
25 typedef uint16_t SYS_BOOT_REASON;
26 #define SYS_BOOT_NORMALLY ((SYS_BOOT_REASON)0)
27 #define SYS_BOOT_ENCOUNTER_PMU_FORCE_SIGNAL ((SYS_BOOT_REASON)1 << 0)
28 #define SYS_BOOT_ENCOUNTER_SDA_IS_LOW ((SYS_BOOT_REASON)1 << 1)
29 #define SYS_BOOT_ENCOUNTER_UNKNOWN_FLASH ((SYS_BOOT_REASON)1 << 2)
30 #define SYS_BOOT_ENCOUNTER_BAD_FLASH_CODE ((SYS_BOOT_REASON)1 << 3)
31 #define SYS_BOOT_ENCOUNTER_WATCH_DOG_RST ((SYS_BOOT_REASON)1 << 4)
32 #define SYS_BOOT_ENCOUNTER_DEEP_SLEEP ((SYS_BOOT_REASON)1 << 5)
33 //#define SYS_BOOT_ENCOUNTER_ICE_IS_ACTIVE ((SYS_BOOT_REASON)1 << 6)
34 #define SYS_BOOT_ENCOUNTER_SOFTWARE_RST ((SYS_BOOT_REASON)1 << 7)
35 
36 typedef union union_sys_boot_reason
37 {
38  uint16_t value;
39  struct stru_sys_boot_reason
40  {
41  bool EncounterPmuForceSignal : 1;
42  bool EncounterSdaIsLow : 1;
43  bool EncounterUnknownFlash : 1;
44  bool EncounterBadFlashCode : 1;
45  bool EncounterWatchdogRst : 1;
46  bool EncounterDeepSleep : 1;
47  bool EncounterIceIsActive : 1;
48  bool EncounterSoftwareRst : 1;
49  bool reserved_b8 : 1;
50  bool reserved_b9 : 1;
51  bool reserved_b10 : 1;
52  bool reserved_b11 : 1;
53  bool reserved_b12 : 1;
54  bool reserved_b13 : 1;
55  bool reserved_b14 : 1;
56  bool reserved_b15 : 1;
57  } field;
58 
59 } SYS_BOOT_REASON_UNION;
60 
61 typedef uint8_t SYS_POWER_LV;
62 #define SYS_POWER_MODE_ACTIVE ((SYS_POWER_LV)0)
63 #define SYS_POWER_MODE_FROZEN ((SYS_POWER_LV)1)
64 #define SYS_POWER_MODE_SLEEP ((SYS_POWER_LV)2)
65 #define SYS_POWER_MODE_DEEP_SLEEP ((SYS_POWER_LV)3)
66 #define SYS_POWER_MODE_SHUTDOWN ((SYS_POWER_LV)4)
67 
69 /*
70  * HCI Command OPCODE
71  */
72 #define HCI_CMDCODE_VENDOR HCI_COMBINED_OPCODE(HCI_CMD_OGF_AIROHA_VENDOR,HCI_CMD_OCF_AIROHA_VENDOR)
73 
74 
75 /*
76  * HCI Event Code
77  */
78 #define HCI_EVENT_VENDOR_EVENT ((HCI_EVTCODE)0xFF)
79 
80 #ifdef _MSC_VER
81 __pragma(pack(push, 1))
82 #define __attribute__(x)
83 #endif
84 
85  /*
86  * HCI Vendor Command Format
87  */
88 typedef struct stru_hci_vendor_command_opcode_stru
89 {
90  uint8_t VCmdOcf;
91  uint8_t VCmdOgf;
92 } __attribute__((packed)) HCI_VCMD_OPCODE_STRU;
93 
94 #ifdef _MSC_VER
95  __pragma(pack(pop))
96 #undef __attribute__
97 #endif
98 
99 typedef uint8_t HCI_VOGF;
100 
101 
102 /*
103  * AIROHA Information Descriptor
104  */
105 typedef uint8_t INFO_TYPE;
106 #define AIRO_INFO_TYPE_ROM_VERSION (INFO_TYPE)0x01
107 #define AIRO_INFO_TYPE_BOOT_STATUS (INFO_TYPE)0x81
108 #define AIRO_INFO_TYPE_FLASH_INFO (INFO_TYPE)0x82
109 #define AIRO_INFO_TYPE_POWER_LEVEL (INFO_TYPE)0x83
110 
111 
112 
113 /*
114  * AIROHA proprietory HCI Command OGFs
115  */
116 #define HCI_CMD_OGF_AIROHA_AUDIO (HCI_CMD_OGF)0x3D
117 #define HCI_CMD_OGF_AIROHA_MMI (HCI_CMD_OGF)0x3E
118 #define HCI_CMD_OGF_AIROHA_VENDOR (HCI_CMD_OGF)0x3F
119 
120 
121 
122 /*
123  * AIROHA proprietory HCI Command OCFs
124  */
125 #define HCI_CMD_OCF_AIROHA_VENDOR (HCI_CMD_OCF)0x00
126 
127 
128 typedef uint16_t HCI_VOPCODE;
129 #define HCI_COMBINED_VOPCODE(vogf,vocf) (((HCI_VOPCODE)(vogf)<<8)|(HCI_VOPCODE)(vocf))
130 
131 
132 
133 /*
134  * HCI Vendor-Specifc Event Code
135  */
136 #define HCI_EVT_AIROHA_VENDOR (HCI_EVTCODE)0xFF
137 
138 /* HCI AIROHA Proprietary Event OpCode */
139 typedef uint8_t HCI_VEVT_OCF;
140 
141 /*
142  * HCI Vendor Event OCF General Group
143  */
144 #define HCI_VEVT_OCF_COMMAMD_COMPLETE (HCI_VEVT_OCF)0x01
145 #define HCI_VEVT_OCF_BOOT_STATUS (HCI_VEVT_OCF)0x02
146 
147 /*
148  * HCI Vendor Event OCF LabTest Group
149  */
150 #define HCI_VEVT_OCF_BTX_REPORT (HCI_VEVT_OCF)0x01
151 #define HCI_VEVT_OCF_CRX_REPORT (HCI_VEVT_OCF)0x02
152 #define HCI_VEVT_OCF_BRX_REPORT (HCI_VEVT_OCF)0x03
153 #define HCI_VEVT_OCF_BER_REPORT (HCI_VEVT_OCF)0x04
154 #define HCI_VEVT_OCF_CALIBRATION_4V2_DAC_TEST_REPORT (HCI_VEVT_OCF)0x05
155 #define HCI_VEVT_OCF_DBG_PRINT (HCI_VEVT_OCF)0xFE
156 
157 /*
158  * HCI Vendor Event OCF System Prompt Group
159  */
160 #define HCI_VEVT_OCF_CHANNEL_ASSESSMENT_REPORT (HCI_VEVT_OCF)0x01
161 
162 /*
163  * HCI Vendor Event Gatt Event Group
164  */
165 #define HCI_VEVT_OCF_GATT_PROC_END (HCI_VEVT_OCF)0x01
166 #define HCI_VEVT_OCF_GATT_PROC_ERROR (HCI_VEVT_OCF)0x02
167 #define HCI_VEVT_OCF_GATT_GET_ATT_UUID (HCI_VEVT_OCF)0x03
168 #define HCI_VEVT_OCF_GATT_GET_ATT_VALUE (HCI_VEVT_OCF)0x04
169 #define HCI_VEVT_OCF_GATT_GET_ATT_PART_VALUE (HCI_VEVT_OCF)0x05
170 #define HCI_VEVT_OCF_GATT_GET_ATT_PACK_VALUE (HCI_VEVT_OCF)0x06
171 /*
172  * HCI Vendor Event OGF
173  */
174 #define HCI_VEVT_OGF_MMI_GROUP (HCI_VOGF)0x00
175 #define HCI_VEVT_OGF_GENERAL_GROUP (HCI_VOGF)0x30
176 #define HCI_VEVT_OGF_LABTEST_GROUP (HCI_VOGF)0x31
177 #define HCI_VEVT_OGF_SYSTEM_PROMPT (HCI_VOGF)0x32
178 #define HCI_VEVT_OGF_AUDIO_GROUP (HCI_VOGF)0x04
179 #define HCI_VEVT_OGF_GATT_EVENT_GROUP (HCI_VOGF)0x33
180 
181 /*
182  * HCI Airoha Vendor Event OpCodes
183  */
184 /* The following Event OpCodes are General Group */
185 #define HCI_VEVTCODE_COMMAMD_COMPLETE HCI_COMBINED_VOPCODE(HCI_VEVT_OGF_GENERAL_GROUP,HCI_VEVT_OCF_COMMAMD_COMPLETE)
186 #define HCI_VEVTCODE_BOOT_STATUS HCI_COMBINED_VOPCODE(HCI_VEVT_OGF_GENERAL_GROUP,HCI_VEVT_OCF_BOOT_STATUS)
187 
188 /* The following Event OpCodes are LabTest Group */
189 #define HCI_VEVTCODE_BTX_REPORT HCI_COMBINED_VOPCODE(HCI_VEVT_OGF_LABTEST_GROUP,HCI_VEVT_OCF_BTX_REPORT)
190 #define HCI_VEVTCODE_CRX_REPORT HCI_COMBINED_VOPCODE(HCI_VEVT_OGF_LABTEST_GROUP,HCI_VEVT_OCF_CRX_REPORT)
191 #define HCI_VEVTCODE_BRX_REPORT HCI_COMBINED_VOPCODE(HCI_VEVT_OGF_LABTEST_GROUP,HCI_VEVT_OCF_BRX_REPORT)
192 #define HCI_VEVTCODE_BER_REPORT HCI_COMBINED_VOPCODE(HCI_VEVT_OGF_LABTEST_GROUP,HCI_VEVT_OCF_BER_REPORT)
193 #define HCI_VEVTCODE_CALIBRATION_4V2_DAC_TEST_REPORT HCI_COMBINED_VOPCODE(HCI_VEVT_OGF_LABTEST_GROUP,HCI_VEVT_OCF_CALIBRATION_4V2_DAC_TEST_REPORT)
194 
195 /* The following Event OpCodes are Systen Prompt Group */
196 #define HCI_VEVTCODE_CHANNEL_ASSESSMENT_REPORT HCI_COMBINED_VOPCODE(HCI_VEVT_OGF_SYSTEM_PROMPT,HCI_VEVT_OCF_CHANNEL_ASSESSMENT_REPORT)
197 
198 
199 
200 /*
201  * HCI Vendor Command OCF
202  */
203 typedef uint8_t HCI_VCMD_OCF;
204 /* HCI Vendor Command OCF General Group */
205 #define HCI_VCMD_OCF_GENERAL_POWER_LEVEL_CONTROL (HCI_VCMD_OCF)0x01
206 #define HCI_VCMD_OCF_GENERAL_READ_STATUS (HCI_VCMD_OCF)0x02
207 #define HCI_VCMD_OCF_GENERAL_MODE_CHANGED (HCI_VCMD_OCF)0x03
208 #define HCI_VCMD_OCF_GENERAL_SOFTWARE_RESET (HCI_VCMD_OCF)0x04
209 
210 /* HCI Vendor Command OCF LabTest Group */
211 #define HCI_VCMD_OCF_LABTEST_START (HCI_VCMD_OCF)0x01
212 #define HCI_VCMD_OCF_LABTEST_PAUSE (HCI_VCMD_OCF)0x02
213 #define HCI_VCMD_OCF_LABTEST_ENTER_TEST_MODE (HCI_VCMD_OCF)0x03
214 #define HCI_VCMD_OCF_LABTEST_REPORT_RATE_SETUP (HCI_VCMD_OCF)0x04
215 #define HCI_VCMD_OCF_LABTEST_SINGLE_TONE_SETUP (HCI_VCMD_OCF)0x05
216 #define HCI_VCMD_OCF_LABTEST_CTX_DATA (HCI_VCMD_OCF)0x06
217 #define HCI_VCMD_OCF_LABTEST_BTX_PACKET (HCI_VCMD_OCF)0x07
218 #define HCI_VCMD_OCF_LABTEST_CRX_START (HCI_VCMD_OCF)0x08
219 #define HCI_VCMD_OCF_LABTEST_BRX_PACKET (HCI_VCMD_OCF)0x09
220 #define HCI_VCMD_OCF_LABTEST_CONFIG_UAP_AND_LAP (HCI_VCMD_OCF)0x0A
221 #define HCI_VCMD_OCF_LABTEST_CONFIG_TX_IQ_FREQUENCY (HCI_VCMD_OCF)0x0B
222 #define HCI_VCMD_OCF_LABTEST_CONFIG_WRITE_SFR (HCI_VCMD_OCF)0x0C
223 #define HCI_VCMD_OCF_LABTEST_CONFIG_READ_SFR (HCI_VCMD_OCF)0x0D
224 #define HCI_VCMD_OCF_LABTEST_CONFIG_WRITE_XDATA (HCI_VCMD_OCF)0x0E
225 #define HCI_VCMD_OCF_LABTEST_CONFIG_READ_XDATA (HCI_VCMD_OCF)0x0F
226 #define HCI_VCMD_OCF_LABTEST_WRITE_THREE_WIRED (HCI_VCMD_OCF)0x10
227 #define HCI_VCMD_OCF_LABTEST_READ_THREE_WIRED (HCI_VCMD_OCF)0x11
228 #define HCI_VCMD_OCF_LABTEST_CONTINUOUS_WRITE_SFR_3WIRED (HCI_VCMD_OCF)0x12
229 #define HCI_VCMD_OCF_LABTEST_READ_ADC0 (HCI_VCMD_OCF)0x13
230 #define HCI_VCMD_OCF_LABTEST_CHARGER_BAND_GAP_CALIBRATION (HCI_VCMD_OCF)0x14
231 #define HCI_VCMD_OCF_LABTEST_CHARGER_CAL_4V2_DAC_TEST (HCI_VCMD_OCF)0x15
232 #define HCI_VCMD_OCF_LABTEST_CONFIG_WRITE_CSR (HCI_VCMD_OCF)0x16
233 #define HCI_VCMD_OCF_LABTEST_CONFIG_READ_CSR (HCI_VCMD_OCF)0x17
234 #define HCI_VCMD_OCF_LABTEST_CONTINUOUS_WRITE_3WIRED (HCI_VCMD_OCF)0x18
235 #define HCI_VCMD_OCF_LABTEST_READ_SAR_ADC (HCI_VCMD_OCF)0x19
236 #define HCI_VCMD_OCF_LABTEST_CONFIG_WRITE_BD_ADDR (HCI_VCMD_OCF)0x1A
237 #define HCI_VCMD_OCF_LABTEST_LE_RECEIVER_TEST (HCI_VCMD_OCF)0x1B
238 #define HCI_VCMD_OCF_LABTEST_LE_TRANSMITTER_TEST (HCI_VCMD_OCF)0x1C
239 #define HCI_VCMD_OCF_LABTEST_LE_TRX_END (HCI_VCMD_OCF)0x1D
240 #define HCI_VCMD_OCF_LABTEST_CONFIG_WRITE_CSR_FOUR_BYTE_ADDRESS (HCI_VCMD_OCF)0x1E
241 #define HCI_VCMD_OCF_LABTEST_CONFIG_READ_CSR_FOUR_BYTE_ADDRESS (HCI_VCMD_OCF)0x1F
242 #define HCI_VCMD_OCF_LABTEST_ENTER_RELAY_MODE (HCI_VCMD_OCF)0x20
243 
244 /* HCI Vendor Command OCF System Prompt Group */
245 #define HCI_VCMD_OCF_SYSTEM_PROMPT_CHANNEL_ASSESSMENT_CTRL (HCI_VCMD_OCF)0x01
246 
247 /* HCI Vendor Command OCF ISP Group */
248 #define HCI_VCMD_OCF_ISP_DEVICE_SATUS (HCI_VCMD_OCF) 0x00
249 
250 /* HCI Vendor Command OCF Audio Group */
251 #define HCI_CMD_OCF_AUDIO_SWITCH (HCI_CMD_OCF)0x0101
252 
253 /*
254  * HCI Vendor Command OGF
255  */
256 #define HCI_VCMD_OGF_MMI_GROUP (HCI_VOGF)0x00
257 #define HCI_VCMD_OGF_GENERAL_GROUP (HCI_VOGF)0x30
258 #define HCI_VCMD_OGF_LABTEST_GROUP (HCI_VOGF)0x31
259 #define HCI_VCMD_OGF_SYSTEM_PROMPT_GROUP (HCI_VOGF)0x32
260 #define HCI_VCMD_OGF_APPLICATION_GROUP (HCI_VOGF)0x33
261 #define HCI_VCMD_OGF_0x34_GROUP (HCI_VOGF)0x34
262 #define HCI_VCMD_OGF_ISP_GROUP (HCI_VOGF)0x35
263 #define HCI_VCMD_OGF_AUDIO_GROUP (HCI_VOGF)0x06
264 
265 /*
266  * HCI Airoha Vendor Command OpCodes
267  */
268 /* The following Command OpCodes are General Group */
269 #define HCI_VCMDCODE_GENERAL_POWER_LEVEL_CONTROL HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_GENERAL_GROUP,HCI_VCMD_OCF_GENERAL_POWER_LEVEL_CONTROL)
270 #define HCI_VCMDCODE_GENERAL_READ_STATUS HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_GENERAL_GROUP,HCI_VCMD_OCF_GENERAL_READ_STATUS)
271 #define HCI_VCMDCODE_GENERAL_MODE_CHANGED HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_GENERAL_GROUP,HCI_VCMD_OCF_GENERAL_MODE_CHANGED)
272 #define HCI_VCMDCODE_GENERAL_SOFTWARE_RESET HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_GENERAL_GROUP,HCI_VCMD_OCF_GENERAL_SOFTWARE_RESET)
273 
274 
275 /* The following Command OpCodes are LabTest Group */
276 #define HCI_VCMDCODE_LABTEST_START HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_START)
277 #define HCI_VCMDCODE_LABTEST_PAUSE HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_PAUSE)
278 #define HCI_VCMDCODE_LABTEST_ENTER_TEST_MODE HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_ENTER_TEST_MODE)
279 #define HCI_VCMDCODE_LABTEST_REPORT_RATE_SETUP HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_REPORT_RATE_SETUP)
280 #define HCI_VCMDCODE_LABTEST_SINGLE_TONE_SETUP HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_SINGLE_TONE_SETUP)
281 #define HCI_VCMDCODE_LABTEST_CTX_DATA HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CTX_DATA)
282 #define HCI_VCMDCODE_LABTEST_BTX_PACKET HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_BTX_PACKET)
283 #define HCI_VCMDCODE_LABTEST_CRX_START HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CRX_START)
284 #define HCI_VCMDCODE_LABTEST_BRX_PACKET HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_BRX_PACKET)
285 #define HCI_VCMDCODE_LABTEST_CONFIG_UAP_AND_LAP HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONFIG_UAP_AND_LAP)
286 #define HCI_VCMDCODE_LABTEST_CONFIG_TX_IQ_FREQUENCY HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONFIG_TX_IQ_FREQUENCY)
287 #define HCI_VCMDCODE_LABTEST_CONFIG_WRITE_SFR HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONFIG_WRITE_SFR)
288 #define HCI_VCMDCODE_LABTEST_CONFIG_READ_SFR HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONFIG_READ_SFR)
289 #define HCI_VCMDCODE_LABTEST_CONFIG_WRITE_XDATA HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONFIG_WRITE_XDATA)
290 #define HCI_VCMDCODE_LABTEST_CONFIG_READ_XDATA HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONFIG_READ_XDATA)
291 #define HCI_VCMDCODE_LABTEST_WRITE_THREE_WIRED HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_WRITE_THREE_WIRED)
292 #define HCI_VCMDCODE_LABTEST_READ_THREE_WIRED HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_READ_THREE_WIRED)
293 #define HCI_VCMDCODE_LABTEST_CONTINUOUS_WRITE_SFR_3WIRED HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONTINUOUS_WRITE_SFR_3WIRED)
294 #define HCI_VCMDCODE_LABTEST_READ_ADC0 HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_READ_ADC0)
295 #define HCI_VCMDCODE_LABTEST_BAND_GAP_CALIBRATION HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CHARGER_BAND_GAP_CALIBRATION)
296 #define HCI_VCMDCODE_LABTEST_CAL_4V2_DAC_TEST HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CHARGER_CAL_4V2_DAC_TEST)
297 #define HCI_VCMDCODE_LABTEST_CONFIG_WRITE_CSR HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONFIG_WRITE_CSR)
298 #define HCI_VCMDCODE_LABTEST_CONFIG_READ_CSR HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONFIG_READ_CSR)
299 #define HCI_VCMDCODE_LABTEST_CONTINUOUS_WRITE_3WIRED HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONTINUOUS_WRITE_3WIRED)
300 #define HCI_VCMDCODE_LABTEST_READ_SAR_ADC HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_READ_SAR_ADC)
301 #define HCI_VCMDCODE_LABTEST_CONFIG_WRITE_BD_ADDR HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONFIG_WRITE_BD_ADDR)
302 #define HCI_VCMDCODE_LABTEST_LE_RECEIVER_TEST HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_LE_RECEIVER_TEST)
303 #define HCI_VCMDCODE_LABTEST_LE_TRANSMITTER_TEST HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_LE_TRANSMITTER_TEST)
304 #define HCI_VCMDCODE_LABTEST_LE_TRX_END HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_LE_TRX_END)
305 #define HCI_VCMDCODE_LABTEST_CONFIG_WRITE_CSR_FOUR_BYTE_ADDRESS HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONFIG_WRITE_CSR_FOUR_BYTE_ADDRESS)
306 #define HCI_VCMDCODE_LABTEST_CONFIG_READ_CSR_FOUR_BYTE_ADDRESS HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_CONFIG_READ_CSR_FOUR_BYTE_ADDRESS)
307 #define HCI_VCMDCODE_LABTEST_ENTER_RELAY_MODE HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_LABTEST_GROUP,HCI_VCMD_OCF_LABTEST_ENTER_RELAY_MODE)
308 
309 
310 /* The following Command OpCodes are System Prompt Group */
311 #define HCI_VCMDCODE_SYSTEM_PROMPT_CHANNEL_ASSESSMENT_CTRL HCI_COMBINED_VOPCODE(HCI_VCMD_OGF_SYSTEM_PROMPT_GROUP,HCI_VCMD_OCF_SYSTEM_PROMPT_CHANNEL_ASSESSMENT_CTRL)
312 
313 
314 /* HCI Vendor Command OCF */
315 #define HCI_CMD_OCF_AIROHA_SET_BY_PASS (HCI_CMD_OCF)0x0001
316 #define HCI_CMD_OCF_AIROHA_RESET_BY_PASS (HCI_CMD_OCF)0x0002
317 
318 
319 /*
320  * AIROHA proprietory HCI Error Code
321  */
322 #define HCI_ERRCODE_SFR_CSR_INIT_FAILED (HCI_ERRCODE)0xFD
323 #define HCI_ERRCODE_AFE_INIT_FAILED (HCI_ERRCODE)0xFE
324 #define HCI_ERRCODE_BAND_GAP_CALIBRATION_FAILED (HCI_ERRCODE)0xFF
325 
326 /*
327  * BT type
328  */
329 
330 #ifdef _MSC_VER
331  __pragma(pack(push, 1))
332 #define __attribute__(x)
333 #endif
334 
335 /* AFE Init */
336 typedef struct stru_vcmd_afe_init
337 {
338  uint8_t B0;
339  uint8_t B1;
340  uint8_t Addr;
341 
342 } __attribute__((packed))VCMD_AFE_INIT_STRU;
343 
344 typedef struct stru_vcmd_sfr_init
345 {
346  uint8_t Data;
347  uint8_t Offset;
348  uint8_t Bank;
349 
350 } __attribute__((packed))VCMD_SFR_INIT_STRU;
351 
352 typedef struct stru_vcmd_delay_init
353 {
354  uint8_t B0;
355  uint8_t B1;
356  uint8_t Tag;
357 
358 } __attribute__((packed))VCMD_DELAY_INIT_STRU;
359 
360 typedef struct stru_vcmd_generic_init
361 {
362  uint8_t B0;
363  uint8_t B1;
364  uint8_t B2;
365 
366 } __attribute__((packed))VCMD_GENERIC_INIT_STRU;
367 
368 typedef union u_vcmd_init
369 {
370  VCMD_AFE_INIT_STRU AfeInit;
371  VCMD_SFR_INIT_STRU SfrInit;
372  VCMD_DELAY_INIT_STRU DelayInit;
373  VCMD_GENERIC_INIT_STRU GenericInit;
374 
375 } __attribute__((packed))VCMD_INIT_UNION;
376 
377 
378 /* CSR Structure */
379 typedef struct stru_vcmd_csr
380 {
381  uint16_t Addr;
382  uint8_t ByteAlign;
383  uint8_t Data[1];
384 
385 } __attribute__((packed))VCMD_CSR_STRU;
386 
387 /* CSR Structure */
388 typedef struct stru_vcmd_csr_four_byte_address
389 {
390  uint32_t Addr;
391  uint8_t ByteAlign;
392  uint8_t Data[1];
393 
394 } __attribute__((packed))VCMD_CSR_FOUR_BYTE_ADDRESS_STRU;
395 
396 
397 /*
398  * HCI Airo-Info Descriptor Type
399  */
400 
401 /*
402  * 0x01 ROM Version Descriptor
403  */
404 typedef struct stru_airo_info_para_rom_ver
405 {
406  uint8_t AsicROMVer[1];
407 } __attribute__((packed)) AIRO_INFO_PARA_ROM_VER_STRU;
408 
409 typedef struct stru_airo_info_rom_ver
410 {
411  uint8_t Type;
412  uint8_t InfoLen;
413  AIRO_INFO_PARA_ROM_VER_STRU Info;
414 
415 } __attribute__((packed)) AIRO_INFO_ROM_VER_STRU;
416 
417 
418 /*
419  * 0x81 Boot Status Descriptor
420  */
421 typedef struct stru_airo_info_para_boot_status
422 {
423  SYS_MODE SysMode;
424  SYS_BOOT_REASON BootReason;
425 
426 } __attribute__((packed)) AIRO_INFO_PARA_BOOT_STATUS_STRU;
427 
428 typedef struct stru_airo_info_boot_status
429 {
430  uint8_t Type;
431  uint8_t InfoLen;
432  AIRO_INFO_PARA_BOOT_STATUS_STRU Info;
433 
434 } __attribute__((packed)) AIRO_INFO_BOOT_STATUS_STRU;
435 
436 
437 /*
438  * 0x82 Flash-Info Descriptor
439  */
440 typedef struct stru_airo_info_para_flsh_info
441 {
442  uint8_t ManufacturerID;
443  uint8_t MemType2;
444  uint8_t FlashStatus;
445 
446 } __attribute__((packed)) AIRO_INFO_PARA_FLSH_INFO_STRU;
447 
448 typedef struct stru_airo_info_flsh_info
449 {
450  uint8_t Type;
451  uint8_t InfoLen;
452  AIRO_INFO_PARA_FLSH_INFO_STRU Info;
453 } __attribute__((packed)) AIRO_INFO_FLSH_INFO_STRU;
454 
455 
456 /*
457  * 0x83 Power Level Descriptor
458  */
459 typedef struct stru_airo_info_para_pwr_level
460 {
461  SYS_POWER_LV AdaptivePowerLv;
462  SYS_POWER_LV ConstrainedPowerLv;
463 
464 } __attribute__((packed)) AIRO_INFO_PARA_POWER_LEVEL_STRU;
465 
466 typedef struct stru_airo_info_pwr_level
467 {
468  uint8_t Type;
469  uint8_t InfoLen;
470  AIRO_INFO_PARA_POWER_LEVEL_STRU Info;
471 
472 } __attribute__((packed)) AIRO_INFO_POWER_LEVEL_STRU;
473 
474 
475 /* Airo-Info Descriptor Prototype */
476 typedef struct stru_airo_info_descriptor
477 {
478  AIRO_INFO_ROM_VER_STRU RomVer;
479  AIRO_INFO_BOOT_STATUS_STRU BootStatus;
480  AIRO_INFO_POWER_LEVEL_STRU PowerLv;
481 
482 } __attribute__((packed)) AIRO_INFO_DESCRIPTOR_STRU;
483 
484 #ifdef _MSC_VER
485  __pragma(pack(pop))
486 #undef __attribute__
487 #endif
488 
489 /*
490  * HCI Vendor Command Prototype
491  */
492 typedef struct stru_hci_vcmd
493 {
494  HCI_CMD_HDR_STRU Hdr;
495  HCI_VCMD_OPCODE_STRU VOpCode;
496  uint8_t Para[1];
497 
498 } HCI_VCMD_STRU, * HCI_VCMD_STRU_PTR;
499 
500 
501 /*
502  * 30.01 HCI Airoha General Power Level Control Command
503  */
504 typedef struct stru_hci_vcmd_para_gnl_pwr_lv_ctrl
505 {
506  uint8_t ConstrainedPowerLv;
507 
508 } HCI_VCMD_PARA_GNL_PWR_LV_CTRL;
509 
510 typedef struct stru_hci_vcmd_gnl_pwr_lv_ctrl
511 {
512  HCI_CMD_HDR_STRU Hdr;
513  HCI_VCMD_OPCODE_STRU VOpCode;
514  HCI_VCMD_PARA_GNL_PWR_LV_CTRL Para;
515 
516 } HCI_VCMD_GNL_PWR_LV_CTRL;
517 
518 typedef struct stru_hci_vcmd_rtn_para_gnl_pwr_lv_ctrl
519 {
520  uint8_t Status;
521 
522 } HCI_VCMD_RTN_PARA_GNL_PWR_LV_CTRL;
523 
524 
525 /*
526  * 31.01 HCI Airoha LabTest Start
527  */
528 typedef struct stru_hci_vcmd_rtn_para_labtest_start
529 {
530  uint8_t Status;
531 
532 } HCI_VCMD_RTN_PARA_LABTEST_START;
533 
534 
535 /*
536  * 31.03 HCI Airoha LabTest Enter Test Mode Command
537  */
538 typedef struct stru_hci_vcmd_rtn_para_labtest_ent_test_mode
539 {
540  uint8_t Status;
541 
542 } HCI_VCMD_RTN_PARA_LABTEST_ENT_TEST_MODE;
543 
544 
545 /*
546  * 31.04 HCI Airoha LabTest Report Rate Setup
547  */
548 typedef struct stru_hci_vcmd_para_labtest_rpt_rate_setup
549 {
550  uint8_t RptRateB0;
551  uint8_t RptRateB1;
552 
553 } HCI_VCMD_PARA_LABTEST_RPT_RATE_SETUP;
554 
555 typedef struct stru_hci_vcmd_labtest_rpt_rate_setup
556 {
557  HCI_CMD_HDR_STRU Hdr;
558  HCI_VCMD_OPCODE_STRU VOpCode;
559  HCI_VCMD_PARA_LABTEST_RPT_RATE_SETUP Para;
560 
561 } HCI_VCMD_LABTEST_RPT_RATE_SETUP;
562 
563 typedef struct stru_hci_vcmd_rtn_para_labtest_rpt_rate_setup
564 {
565  uint8_t Status;
566 
567 } HCI_VCMD_RTN_PARA_LABTEST_RPT_RATE_SETUP;
568 
569 
570 /*
571  * 31.0C HCI Airoha LabTest Config. Write SFR Command
572  */
573 typedef struct stru_hci_vcmd_para_labtest_cfg_wr_sfr
574 {
575  uint8_t Value;
576  uint8_t Offset;
577  uint8_t Bank;
578 
579 } HCI_VCMD_PARA_LABTEST_CFG_WR_SFR;
580 
581 typedef struct stru_hci_vcmd_labtest_cfg_wr_sfr
582 {
583  HCI_CMD_HDR_STRU Hdr;
584  HCI_VCMD_OPCODE_STRU VOpCode;
585  HCI_VCMD_PARA_LABTEST_CFG_WR_SFR Para;
586 
587 } HCI_VCMD_LABTEST_CFG_WR_SFR;
588 
589 typedef struct stru_hci_vcmd_rtn_para_labtest_cfg_wr_sfr
590 {
591  uint8_t Status;
592 
593 } HCI_VCMD_RTN_PARA_LABTEST_CFG_WR_SFR;
594 
595 
596 /*
597  * 31.0D HCI Airoha LabTest Config. Read SFR Command
598  */
599 typedef struct stru_hci_vcmd_para_labtest_cfg_rd_sfr
600 {
601  uint8_t Offset;
602  uint8_t Bank;
603 
604 } HCI_VCMD_PARA_LABTEST_CFG_RD_SFR;
605 
606 typedef struct stru_hci_vcmd_labtest_cfg_rd_sfr
607 {
608  HCI_CMD_HDR_STRU Hdr;
609  HCI_VCMD_OPCODE_STRU VOpCode;
610  HCI_VCMD_PARA_LABTEST_CFG_RD_SFR Para;
611 
612 } HCI_VCMD_LABTEST_CFG_RD_SFR;
613 
614 typedef struct stru_hci_vcmd_rtn_para_labtest_cfg_rd_sfr
615 {
616  uint8_t Status;
617  uint8_t Value;
618  uint8_t Offset;
619  uint8_t Bank;
620 
621 } HCI_VCMD_RTN_PARA_LABTEST_CFG_RD_SFR;
622 
623 
624 /*
625  * 31.0E HCI Airoha LabTest Config. Write XDATA Command
626  */
627 typedef struct stru_hci_vcmd_para_labtest_cfg_wr_xdata
628 {
629  uint8_t StartAddrB0;
630  uint8_t StartAddrB1;
631  uint8_t Length;
632  uint8_t Data[1];
633 
634 } HCI_VCMD_PARA_LABTEST_CFG_WR_XDATA;
635 
636 typedef struct stru_hci_vcmd_labtest_cfg_wr_xdata
637 {
638  HCI_CMD_HDR_STRU Hdr;
639  HCI_VCMD_OPCODE_STRU VOpCode;
640  HCI_VCMD_PARA_LABTEST_CFG_WR_XDATA Para;
641 
642 } HCI_VCMD_LABTEST_CFG_WR_XDATA;
643 
644 typedef struct stru_hci_vcmd_rtn_para_labtest_cfg_wr_xdata
645 {
646  uint8_t Status;
647 
648 } HCI_VCMD_RTN_PARA_LABTEST_CFG_WR_XDATA;
649 
650 
651 /*
652  * 31.0F HCI Airoha LabTest Config. Read XDATA Command
653  */
654 typedef struct stru_hci_vcmd_para_labtest_cfg_rd_xdata
655 {
656  uint8_t StartAddrB0;
657  uint8_t StartAddrB1;
658  uint8_t Length;
659 
660 } HCI_VCMD_PARA_LABTEST_CFG_RD_XDATA;
661 
662 typedef struct stru_hci_vcmd_labtest_cfg_rd_xdata
663 {
664  HCI_CMD_HDR_STRU Hdr;
665  HCI_VCMD_OPCODE_STRU VOpCode;
666  HCI_VCMD_PARA_LABTEST_CFG_RD_XDATA Para;
667 
668 } HCI_VCMD_LABTEST_CFG_RD_XDATA;
669 
670 typedef struct stru_hci_vcmd_rtn_para_labtest_cfg_rd_xdata
671 {
672  uint8_t Status;
673  uint8_t RdData[1];
674 
675 } HCI_VCMD_RTN_PARA_CFG_RD_XDATA;
676 
677 #ifdef _MSC_VER
678 __pragma(pack(push, 1))
679 #define __attribute__(x)
680 #endif
681 
682  /*
683  * 31.10 HCI Airoha LabTest Write Three Wired Command
684  */
685  typedef struct stru_hci_vcmd_para_labtest_wr_three_wired
686 {
687  uint8_t LoByte;
688  uint8_t HiByte;
689  uint8_t Addr;
690 
691 } __attribute__((packed))HCI_VCMD_PARA_LABTEST_WR_THREE_WIRED;
692 
693 typedef struct stru_hci_vcmd_labtest_wr_three_wired
694 {
695  HCI_CMD_HDR_STRU Hdr;
696  HCI_VCMD_OPCODE_STRU VOpCode;
697  HCI_VCMD_PARA_LABTEST_WR_THREE_WIRED Para;
698 
699 } __attribute__((packed))HCI_VCMD_LABTEST_WR_THREE_WIRED;
700 
701 typedef struct stru_hci_vcmd_rtn_para_labtest_wr_three_wired
702 {
703  uint8_t Status;
704 
705 } HCI_VCMD_RTN_PARA_LABTEST_WR_THREE_WIRED;
706 
707 
708 /*
709  * 31.11 HCI Airoha LabTest Read Three Wired Command
710  */
711 typedef struct stru_hci_vcmd_para_labtest_rd_three_wired
712 {
713  uint8_t Addr;
714 
715 } __attribute__((packed)) HCI_VCMD_PARA_LABTEST_RD_THREE_WIRED;
716 
717 typedef struct stru_hci_vcmd_labtest_rd_three_wired
718 {
719  HCI_CMD_HDR_STRU Hdr;
720  HCI_VCMD_OPCODE_STRU VOpCode;
721  HCI_VCMD_PARA_LABTEST_RD_THREE_WIRED Para;
722 
723 } __attribute__((packed))HCI_VCMD_LABTEST_RD_THREE_WIRED;
724 
725 typedef struct stru_hci_vcmd_rtn_para_labtest_rd_three_wired
726 {
727  uint8_t Status;
728  uint8_t ReadDataB0;
729  uint8_t ReadDataB1;
730 
731 } __attribute__((packed))HCI_VCMD_RTN_PARA_LABTEST_RD_THREE_WIRED;
732 
733 
734 
735 /*
736  * 31.12 HCI Airoha LabTest Continuous Write SFR Three Wired Command
737  */
738 typedef struct stru_hci_vcmd_para_labtest_conti_wr_sfr_3wired
739 {
740  uint8_t NumOfReg;
741  VCMD_INIT_UNION Init[1];
742 
743 } __attribute__((packed))HCI_VCMD_PARA_LABTEST_CONTI_WR_SFR_3WIRED;
744 
745 #ifdef _MSC_VER
746  __pragma(pack(pop))
747 #undef __attribute__
748 #endif
749 
750 typedef struct stru_hci_vcmd_labtest_conti_wr_sfr_3wired
751 {
752  HCI_CMD_HDR_STRU Hdr;
753  HCI_VCMD_OPCODE_STRU VOpCode;
754  HCI_VCMD_PARA_LABTEST_CONTI_WR_SFR_3WIRED Para;
755 
756 } HCI_VCMD_LABTEST_CONTI_WR_SFR_3WIRED;
757 
758 typedef struct stru_hci_vcmd_rtn_para_labtest_conti_wr_sfr_3wired
759 {
760  uint8_t Status;
761 
762 } HCI_VCMD_RTN_PARA_LABTEST_CONTI_WR_SFR_3WIRED;
763 
764 
765 /*
766  * 31.14 HCI Airoha LabTest Read ADC0 Command
767  */
768 typedef struct stru_hci_vcmd_rtn_para_labtest_rd_adc0
769 {
770  uint8_t Status;
771  uint16_t ViChgRd;
772  uint16_t VBatRd;
773  uint16_t VChgRd;
774  uint16_t TempRd;
775  uint16_t VBatCalRd;
776  uint16_t VinRd;
777 
778 } HCI_VCMD_RTN_PARA_LABTEST_RD_ADC0;
779 
780 
781 /*
782  * 31.15 HCI Airoha LabTest Band Gap Calibration Command
783  */
784 typedef struct stru_hci_vcmd_para_labtest_bd_gp_cal
785 {
786  uint8_t TargetADCB0;
787  uint8_t TargetADCB1;
788  uint8_t AllowError;
789  uint8_t RdADC0InvlB0;
790  uint8_t RdADC0InvlB1;
791 
792 } HCI_VCMD_PARA_LABTEST_BD_GP_CAL;
793 
794 typedef struct stru_hci_vcmd_labtest_bd_gp_cal
795 {
796  HCI_CMD_HDR_STRU Hdr;
797  HCI_VCMD_OPCODE_STRU VOpCode;
798  HCI_VCMD_PARA_LABTEST_BD_GP_CAL Para;
799 
800 } HCI_VCMD_LABTEST_BD_GP_CAL;
801 
802 typedef struct stru_hci_vcmd_rtn_para_labtest_bd_gp_cal
803 {
804  uint8_t Status;
805  uint8_t BestADCB0;
806  uint8_t BestADCB1;
807  uint8_t CoarseGain;
808  uint8_t FineGain;
809 
810 } HCI_VCMD_RTN_PARA_LABTEST_BD_GP_CAL;
811 
812 #ifdef _MSC_VER
813 __pragma(pack(push, 1))
814 #define __attribute__(x)
815 #endif
816 
817 /*
818 * 31.16 HCI Airoha LabTest Config. Write CSR Command
819 */
820 typedef struct stru_hci_vcmd_para_labtest_cfg_wr_csr
821 {
822  uint8_t NumOfReg;
823  VCMD_CSR_STRU Init[1];
824 
825 } __attribute__((packed))HCI_VCMD_PARA_LABTEST_CFG_WR_CSR;
826 
827 typedef struct stru_hci_vcmd_labtest_cfg_wr_csr
828 {
829  HCI_CMD_HDR_STRU Hdr;
830  HCI_VCMD_OPCODE_STRU VOpCode;
831  HCI_VCMD_PARA_LABTEST_CFG_WR_CSR Para;
832 
833 } __attribute__((packed))HCI_VCMD_LABTEST_CFG_WR_CSR;
834 
835 typedef struct stru_hci_vcmd_rtn_para_labtest_cfg_wr_csr
836 {
837  uint8_t Status;
838 
839 } __attribute__((packed))HCI_VCMD_RTN_PARA_LABTEST_CFG_WR_CSR;
840 
841 
842 /*
843  * 31.17 HCI Airoha LabTest Config. Read CSR Command
844  */
845 typedef struct stru_hci_vcmd_para_labtest_cfg_rd_csr
846 {
847  uint8_t AddrB0;
848  uint8_t AddrB1;
849  uint8_t ByteAlign;
850 
851 } __attribute__((packed))HCI_VCMD_PARA_LABTEST_CFG_RD_CSR;
852 
853 typedef struct stru_hci_vcmd_labtest_cfg_rd_csr
854 {
855  HCI_CMD_HDR_STRU Hdr;
856  HCI_VCMD_OPCODE_STRU VOpCode;
857  HCI_VCMD_PARA_LABTEST_CFG_RD_CSR Para;
858 
859 } __attribute__((packed))HCI_VCMD_LABTEST_CFG_RD_CSR;
860 
861 typedef struct stru_hci_vcmd_rtn_para_labtest_cfg_rd_csr
862 {
863  uint8_t Status;
864  VCMD_CSR_STRU CsrData;
865 
866 } __attribute__((packed))HCI_VCMD_RTN_PARA_LABTEST_CFG_RD_CSR;
867 
868 #ifdef _MSC_VER
869  __pragma(pack(pop))
870 #undef __attribute__
871 #endif
872 
873 /*
874  * 31.18 HCI Airoha LabTest Continuous Write Three Wired Command
875  */
876 typedef struct stru_hci_vcmd_para_labtest_conti_wr_3wired
877 {
878  uint8_t NumOfReg;
879  VCMD_INIT_UNION Init[1];
880 
881 } HCI_VCMD_PARA_LABTEST_CONTI_WR_3WIRED;
882 
883 typedef struct stru_hci_vcmd_labtest_conti_wr_3wired
884 {
885  HCI_CMD_HDR_STRU Hdr;
886  HCI_VCMD_OPCODE_STRU VOpCode;
887  HCI_VCMD_PARA_LABTEST_CONTI_WR_3WIRED Para;
888 
889 } HCI_VCMD_LABTEST_CONTI_WR_3WIRED;
890 
891 typedef struct stru_hci_vcmd_rtn_para_labtest_conti_wr_3wired
892 {
893  uint8_t Status;
894 
895 } HCI_VCMD_RTN_PARA_LABTEST_CONTI_WR_3WIRED;
896 
897 
898 /*
899  * 31.19 HCI Airoha LabTest Read SAR ADC Command
900  */
901 typedef struct stru_hci_vcmd_rtn_para_labtest_rd_sar_adc
902 {
903  uint8_t Status;
904  uint16_t VBatRd;
905  uint16_t VBatGainRd;
906  uint16_t TempRd;
907  uint16_t LdoRetRd;
908 
909 } HCI_VCMD_RTN_PARA_LABTEST_RD_SAR_ADC;
910 
911 #ifdef _MSC_VER
912 __pragma(pack(push, 1))
913 #define __attribute__(x)
914 #endif
915 
916  /*
917  * 31.1A HCI Airoha LabTest Config. Write BD Address Command
918  */
919  typedef struct stru_hci_vcmd_para_labtest_cfg_wr_bd_addr
920 {
921  uint8_t BdAddr[6];
922 
923 } __attribute__((packed)) HCI_VCMD_PARA_LABTEST_CFG_WR_BD_ADDR;
924 
925 typedef struct stru_hci_vcmd_labtest_cfg_wr_bd_addr
926 {
927  HCI_CMD_HDR_STRU Hdr;
928  HCI_VCMD_OPCODE_STRU VOpCode;
929  HCI_VCMD_PARA_LABTEST_CFG_WR_BD_ADDR Para;
930 
931 } __attribute__((packed))HCI_VCMD_LABTEST_CFG_WR_BD_ADDR;
932 
933 #ifdef _MSC_VER
934  __pragma(pack(pop))
935 #undef __attribute__
936 #endif
937 
938 typedef struct stru_hci_vcmd_rtn_para_labtest_cfg_wr_bd_addr
939 {
940  uint8_t Status;
941 
942 } HCI_VCMD_RTN_PARA_LABTEST_CFG_WR_BD_ADDR;
943 
944 
945 /*
946  * 31.1B HCI Airoha LabTest LE Receiver Test Command
947  */
948 typedef struct stru_hci_vcmd_para_labtest_le_rx_test
949 {
950  uint8_t RxFreq;
951  uint8_t AccessAddrB0;
952  uint8_t AccessAddrB1;
953  uint8_t AccessAddrB2;
954  uint8_t AccessAddrB3;
955  uint8_t AAgcFixGainEnb;
956  uint8_t AAgcFixGain;
957 
958 } HCI_VCMD_PARA_LABTEST_LE_RX_TEST;
959 
960 typedef struct stru_hci_vcmd_labtest_le_rx_test
961 {
962  HCI_CMD_HDR_STRU Hdr;
963  HCI_VCMD_OPCODE_STRU VOpCode;
964  HCI_VCMD_PARA_LABTEST_LE_RX_TEST Para;
965 
966 } HCI_VCMD_LABTEST_LE_RX_TEST;
967 
968 typedef struct stru_hci_vcmd_rtn_para_labtest_le_rx_test
969 {
970  uint8_t Status;
971 
972 } HCI_VCMD_RTN_PARA_LABTEST_LE_RX_TEST;
973 
974 
975 /*
976  * 31.1C HCI Airoha LabTest LE Transmitter Test Command
977  */
978 typedef struct stru_hci_vcmd_para_labtest_le_tx_test
979 {
980  uint8_t TxFreq;
981  uint8_t HeaderB0;
982  uint8_t LenOfTestData;
983  uint8_t PktPayload;
984  uint8_t AccessAddrB0;
985  uint8_t AccessAddrB1;
986  uint8_t AccessAddrB2;
987  uint8_t AccessAddrB3;
988  uint8_t TxGcB0;
989  uint8_t TxGcB1;
990  uint8_t TxBiasB0;
991  uint8_t TxBiasB1;
992 
993 } HCI_VCMD_PARA_LABTEST_LE_TX_TEST;
994 
995 typedef struct stru_hci_vcmd_labtest_le_tx_test
996 {
997  HCI_CMD_HDR_STRU Hdr;
998  HCI_VCMD_OPCODE_STRU VOpCode;
999  HCI_VCMD_PARA_LABTEST_LE_TX_TEST Para;
1000 
1001 } HCI_VCMD_LABTEST_LE_TX_TEST;
1002 
1003 typedef struct stru_hci_vcmd_rtn_para_labtest_le_tx_test
1004 {
1005  uint8_t Status;
1006 
1007 } HCI_VCMD_RTN_PARA_LABTEST_LE_TX_TEST;
1008 
1009 
1010 
1011 /*
1012  * 31.1D HCI Airoha LabTest LE TRx End
1013  */
1014 typedef struct stru_hci_vcmd_rtn_para_labtest_le_trx_end
1015 {
1016  uint8_t Status;
1017 
1018 } HCI_VCMD_RTN_PARA_LABTEST_LE_TRX_END;
1019 
1020 #ifdef _MSC_VER
1021  __pragma(pack(push, 1))
1022 #define __attribute__(x)
1023 #endif
1024 
1025 /*
1026  * 31.1E HCI Airoha LabTest Config. Write CSR Command
1027  */
1028 typedef struct stru_hci_vcmd_para_labtest_cfg_wr_csr_four_byte_address
1029 {
1030  uint8_t NumOfReg;
1031  VCMD_CSR_FOUR_BYTE_ADDRESS_STRU Init[1];
1032 
1033 } __attribute__((packed))HCI_VCMD_PARA_LABTEST_CFG_WR_CSR_FOUR_BYTE_ADDRESS_STRU;
1034 
1035 typedef struct stru_hci_vcmd_labtest_cfg_wr_csr_four_byte_address
1036 {
1037  HCI_CMD_HDR_STRU Hdr;
1038  HCI_VCMD_OPCODE_STRU VOpCode;
1039  HCI_VCMD_PARA_LABTEST_CFG_WR_CSR_FOUR_BYTE_ADDRESS_STRU Para;
1040 
1041 } __attribute__((packed))HCI_VCMD_LABTEST_CFG_WR_CSR_FOUR_BYTE_ADDRESS_STRU;
1042 
1043 typedef struct stru_hci_vcmd_rtn_para_labtest_cfg_wr_csr_four_byte_address
1044 {
1045  uint8_t Status;
1046 
1047 } __attribute__((packed))HCI_VCMD_RTN_PARA_LABTEST_CFG_WR_CSR_FOUR_BYTE_ADDRESS_STRU;
1048 
1049 /*
1050  * 31.1F HCI Airoha LabTest Config. Read CSR Command
1051  */
1052 typedef struct stru_hci_vcmd_para_labtest_cfg_rd_csr_four_byte_address
1053 {
1054  uint8_t AddrB0;
1055  uint8_t AddrB1;
1056  uint8_t AddrB2;
1057  uint8_t AddrB3;
1058  uint8_t ByteAlign;
1059 
1060 } __attribute__((packed))HCI_VCMD_PARA_LABTEST_CFG_RD_CSR_FOUR_BYTE_ADDRESS_STRU;
1061 
1062 typedef struct stru_hci_vcmd_labtest_cfg_rd_csr_four_byte_address
1063 {
1064  HCI_CMD_HDR_STRU Hdr;
1065  HCI_VCMD_OPCODE_STRU VOpCode;
1066  HCI_VCMD_PARA_LABTEST_CFG_RD_CSR_FOUR_BYTE_ADDRESS_STRU Para;
1067 
1068 } __attribute__((packed))HCI_VCMD_LABTEST_CFG_RD_CSR_FOUR_BYTE_ADDRESS_STRU;
1069 
1070 typedef struct stru_hci_vcmd_rtn_para_labtest_cfg_rd_csr_four_byte_address
1071 {
1072  uint8_t Status;
1073  VCMD_CSR_FOUR_BYTE_ADDRESS_STRU CsrData;
1074 
1075 } __attribute__((packed))HCI_VCMD_RTN_PARA_LABTEST_CFG_RD_CSR_FOUR_BYTE_ADDRESS_STRU;
1076 
1077 
1078 /*
1079  * 31.20 HCI Airoha LabTest B die Enter Relay Mode Command
1080  */
1081 typedef struct stru_hci_vcmd_para_labtest_enter_relay_mode
1082 {
1083  uint8_t action;
1084 
1085 }__attribute__((packed))HCI_VCMD_PARA_LABTEST_ENTER_RELAY_MODE_STRU;
1086 
1087 typedef struct stru_hci_vcmd_labtest_enter_relay_mode
1088 {
1089  HCI_CMD_HDR_STRU Hdr;
1090  HCI_VCMD_OPCODE_STRU VOpCode;
1091  HCI_VCMD_PARA_LABTEST_ENTER_RELAY_MODE_STRU Para;
1092 
1093 } __attribute__((packed))HCI_VCMD_LABTEST_ENTER_RELAY_MODE_STRU;
1094 
1095 #ifdef _MSC_VER
1096  __pragma(pack(pop))
1097 #undef __attribute__
1098 #endif
1099 
1100 typedef struct stru_hci_vcmd_rtn_para_labtest_enter_relay_mode
1101 {
1102  uint8_t Status;
1103 
1104 } HCI_VCMD_RTN_PARA_LABTEST_ENTER_RELAY_MODE;
1105 
1106 /*
1107  * 32.01 HCI Airoha System Prompt Channel Assessment Control Command
1108  */
1109 typedef struct stru_hci_vcmd_para_system_prompt_ch_ass_ctrl
1110 {
1111  uint8_t ChAssEnb;
1112 
1113 } HCI_VCMD_PARA_SYSTEM_PROMPT_CH_ASS_CTRL;
1114 
1115 typedef struct stru_hci_vcmd_system_prompt_ch_ass_ctrl
1116 {
1117  HCI_CMD_HDR_STRU Hdr;
1118  HCI_VCMD_OPCODE_STRU VOpCode;
1119  HCI_VCMD_PARA_SYSTEM_PROMPT_CH_ASS_CTRL Para;
1120 
1121 } HCI_VCMD_SYSTEM_PROMPT_CH_ASS_CTRL;
1122 
1123 typedef struct stru_hci_vcmd_rtn_para_system_prompt_ch_ass_ctrl
1124 {
1125  uint8_t Status;
1126 
1127 } HCI_VCMD_RTN_PARA_SYSTEM_PROMPT_CH_ASS_CTRL;
1128 
1129 #ifdef _MSC_VER
1130 __pragma(pack(push, 1))
1131 #define __attribute__(x)
1132 #endif
1133 
1134 /*
1135  * HCI Vendor Event Format
1136  */
1137  typedef struct stru_hci_vendor_event_opcode_stru
1138 {
1139  uint8_t VEvtOcf;
1140  uint8_t VEvtOgf;
1141 
1142 } __attribute__((packed))HCI_VEVT_OPCODE_STRU;
1143 
1144 /*
1145  * 0xFF HCI Vendor-Specific Event Structure
1146  */
1147 typedef struct stru_hci_vevt_para_vdr_spec
1148 {
1149  uint8_t RtnPara[1];
1150 
1151 } __attribute__((packed)) HCI_VEVT_PARA_VDR_SPEC_STRU;
1152 
1153 typedef struct stru_hci_vevt_vdr_spec
1154 {
1155  HCI_EVT_HDR_STRU Hdr;
1156  HCI_VEVT_OPCODE_STRU VEvtOpCode;
1157  HCI_VEVT_PARA_VDR_SPEC_STRU Para;
1158 
1159 } __attribute__((packed))HCI_VEVT_VDR_SPEC_STRU;
1160 
1161 
1162 /*
1163  * 30.01 HCI Airoha Vendor Command Complete
1164  */
1165 typedef struct stru_hci_vevt_para_vcmd_cpl
1166 {
1167  uint8_t VOCF;
1168  uint8_t VOGF;
1169  uint8_t RtnPara[1];
1170 
1171 } __attribute__((packed))HCI_VEVT_PARA_VCMD_CPL_STRU;
1172 
1173 typedef struct stru_hci_vevt_vcmd_cpl
1174 {
1175  HCI_EVT_HDR_STRU Hdr;
1176  HCI_VEVT_OPCODE_STRU VEvtOpCode;
1177  HCI_VEVT_PARA_VCMD_CPL_STRU Para;
1178 
1179 } __attribute__((packed))HCI_VEVT_VCMD_CPL_STRU, * HCI_VEVT_VCMD_CPL_STRU_PTR;
1180 
1181 #ifdef _MSC_VER
1182  __pragma(pack(pop))
1183 #undef __attribute__
1184 #endif
1185 
1186 /*
1187  * 31.01 HCI CTx BTx Report Vendor Event
1188  */
1189 typedef struct stru_hci_vevt_para_btx_rept
1190 {
1191  uint8_t ADCRdB0;
1192  uint8_t ADCRdB1;
1193  uint8_t Gc2;
1194  uint8_t Gc1;
1195  uint8_t Bias2_2;
1196  uint8_t Bias2_1;
1197 
1198 } HCI_VEVT_PARA_BTX_REPT_STRU;
1199 
1200 
1201 /*
1202  * 31.02 HCI CRx Report Vendor Event
1203  */
1204 typedef struct stru_hci_vevt_para_crx_rept
1205 {
1206  uint8_t RSSIAdjust;
1207 
1208 }HCI_VEVT_PARA_CRX_REPT_STRU;
1209 
1210 
1211 /*
1212  * 31.03 HCI BRx Report Vendor Event
1213  */
1214 typedef struct stru_hci_vevt_para_brx_rept
1215 {
1216  uint8_t RpktCntB0;
1217  uint8_t RpktCntB1;
1218  uint8_t CpktCntB0;
1219  uint8_t CpktCntB1;
1220  uint8_t RSSIAdjust;
1221 
1222 }HCI_VEVT_PARA_BRX_REPT_STRU;
1223 
1224 
1225 /*
1226  * 31.04 HCI BER Report Vendor Event
1227  */
1228 typedef struct stru_hci_vevt_para_ber_rept
1229 {
1230  uint8_t BitsCntB0;
1231  uint8_t BitsCntB1;
1232  uint8_t BitsCntB2;
1233  uint8_t BitsCntB3;
1234  uint8_t RpktCntB0;
1235  uint8_t RpktCntB1;
1236  uint8_t EpktCntB0;
1237  uint8_t EpktCntB1;
1238  uint8_t LossCntB0;
1239  uint8_t LossCntB1;
1240  uint8_t HECErrCntB0;
1241  uint8_t HECErrCntB1;
1242  uint8_t CRCErrCntB0;
1243  uint8_t CRCErrCntB1;
1244  uint8_t ErrBitsCntB0;
1245  uint8_t ErrBitsCntB1;
1246  uint8_t ErrBitsCntB2;
1247  uint8_t ErrBitsCntB3;
1248  uint8_t RSSIAdjust;
1249 
1250 }HCI_VEVT_PARA_BER_REPT_STRU;
1251 
1252 
1253 /*
1254  * 31.05 HCI Calibration 4.2v DAC Test Vendor Event Report
1255  */
1256 typedef struct stru_hci_vevt_para_cal_4v2_dac_test_rept
1257 {
1258  uint8_t VBatAvgB0;
1259  uint8_t VBatAvgB1;
1260  uint8_t DAC4v2B0;
1261  uint8_t DAC4v2B1;
1262 
1263 }HCI_VEVT_PARA_CAL_4V2_DAC_TEST_REPT_STRU;
1264 
1265 
1266 /*
1267  * 32.01 HCI Channel Assessment Report Vendor Event
1268  */
1269 typedef struct stru_hci_vevt_para_ch_assess_rept
1270 {
1271  uint8_t ChMap[5];
1272 
1273 } HCI_VEVT_PARA_CH_ASSESS_REPT_STRU;
1274 
1275 
1276 
1277 #endif /* _HCI_AIROHA_H_ */
1278