33#define SPI_MODE_0 (SPI_CTL_TXNEG_Msk)
34#define SPI_MODE_1 (SPI_CTL_RXNEG_Msk)
35#define SPI_MODE_2 (SPI_CTL_CLKPOL_Msk | SPI_CTL_RXNEG_Msk)
36#define SPI_MODE_3 (SPI_CTL_CLKPOL_Msk | SPI_CTL_TXNEG_Msk)
38#define SPI_SLAVE (SPI_CTL_SLAVE_Msk)
39#define SPI_MASTER (0x0)
41#define SPI_SS (SPI_SSCTL_SS_Msk)
42#define SPI_SS_ACTIVE_HIGH (SPI_SSCTL_SSACTPOL_Msk)
43#define SPI_SS_ACTIVE_LOW (0x0)
45#define SPI_IE_MASK (0x01)
46#define SPI_SSTA_INTEN_MASK (0x04)
47#define SPI_FIFO_TX_INTEN_MASK (0x08)
48#define SPI_FIFO_RX_INTEN_MASK (0x10)
49#define SPI_FIFO_RXOV_INTEN_MASK (0x20)
50#define SPI_FIFO_TIMEOUT_INTEN_MASK (0x40)
65#define SPI_ABORT_3WIRE_TRANSFER(spi) ( (spi)->SLVCTL |= SPI_SLVCTL_SLVABT_Msk )
72#define SPI_CLR_3WIRE_START_INT_FLAG(spi) ( (spi)->STATUS = SPI_STATUS_SLVSTIF_Msk )
79#define SPI_CLR_UNIT_TRANS_INT_FLAG(spi) ( (spi)->STATUS = SPI_STATUS_UNITIF_Msk )
86#define SPI_DISABLE_3WIRE_MODE(spi) ( (spi)->SLVCTL &= ~SPI_SLVCTL_SLV3WIRE_Msk )
93#define SPI_ENABLE_3WIRE_MODE(spi) ( (spi)->SLVCTL |= SPI_SLVCTL_SLV3WIRE_Msk )
100#define SPI_GET_RX_FIFO_COUNT(spi) ( (((spi)->STATUS & SPI_STATUS_RXCNT_Msk) >> SPI_STATUS_RXCNT_Pos) & 0xf )
109#define SPI_GET_RX_FIFO_EMPTY_FLAG(spi) ( ((spi)->STATUS & SPI_STATUS_RXEMPTY_Msk) == SPI_STATUS_RXEMPTY_Msk ? 1:0 )
118#define SPI_GET_TX_FIFO_EMPTY_FLAG(spi) ( ((spi)->STATUS & SPI_STATUS_TXEMPTY_Msk) == SPI_STATUS_TXEMPTY_Msk ? 1:0 )
127#define SPI_GET_TX_FIFO_FULL_FLAG(spi) ( ((spi)->STATUS & SPI_STATUS_TXFULL_Msk) == SPI_STATUS_TXFULL_Msk ? 1:0 )
134#define SPI_READ_RX(spi) ( (spi)->RX )
142#define SPI_WRITE_TX(spi, u32TxData) ( (spi)->TX = u32TxData )
151 spi->
SSCTL &= ~SPI_SSCTL_AUTOSS_Msk;
162 spi->
SSCTL &= ~SPI_SSCTL_AUTOSS_Msk;
164 spi->
SSCTL &= ~SPI_SSCTL_SSACTPOL_Msk;
173#define SPI_ENABLE_BYTE_REORDER(spi) ( (spi)->CTL |= SPI_CTL_REORDER_Msk )
180#define SPI_DISABLE_BYTE_REORDER(spi) ( (spi)->CTL &= ~SPI_CTL_REORDER_Msk )
188#define SPI_SET_SUSPEND_CYCLE(spi, u32SuspCycle) ( (spi)->CTL = ((spi)->CTL & ~SPI_CTL_SUSPITV_Msk) | (u32SuspCycle << SPI_CTL_SUSPITV_Pos) )
195#define SPI_SET_LSB_FIRST(spi) ( (spi)->CTL |= SPI_CTL_LSB_Msk )
202#define SPI_SET_MSB_FIRST(spi) ( (spi)->CTL &= ~SPI_CTL_LSB_Msk )
225#define SPI_IS_BUSY(spi) ( ((spi)->CTL & SPI_CTL_SPIEN_Msk) == SPI_CTL_SPIEN_Msk ? 1:0 )
232#define SPI_TRIGGER(spi) ( (spi)->CTL |= SPI_CTL_SPIEN_Msk )
234uint32_t
SPI_Open(
SPI_T *spi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock);
#define SPI_SSCTL_SSACTPOL_Msk
#define SPI_CTL_DWIDTH_Pos
#define SPI_SSCTL_LTF_Msk
void SPI_DisableInt(SPI_T *spi, uint32_t u32Mask)
Disable FIFO related interrupts specified by u32Mask parameter.
static __INLINE void SPI_SET_DATA_WIDTH(SPI_T *spi, uint32_t u32Width)
Set the data width of a SPI transaction.
void SPI_DisableFIFO(SPI_T *spi)
Disable FIFO mode.
void SPI_EnableInt(SPI_T *spi, uint32_t u32Mask)
Enable FIFO related interrupts specified by u32Mask parameter.
static __INLINE void SPI_SET_SS_LOW(SPI_T *spi)
Disable automatic slave select function and set SPI_SS pin to low state.
void SPI_EnableAutoSS(SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
Enable the automatic slave select function. Only available in Master mode.
void SPI_EnableFIFO(SPI_T *spi, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
Enable FIFO mode with user-specified Tx FIFO threshold and Rx FIFO threshold configurations.
void SPI_DisableAutoSS(SPI_T *spi)
Disable the automatic slave select function.
uint32_t SPI_SetBusClock(SPI_T *spi, uint32_t u32BusClock)
Set the SPI bus clock. Only available in Master mode.
void SPI_Close(SPI_T *spi)
Reset SPI module and disable SPI peripheral clock.
static __INLINE void SPI_SET_SS_HIGH(SPI_T *spi)
Disable automatic slave select function and set SPI_SS pin to high state.
void SPI_ClearTxFIFO(SPI_T *spi)
Clear Tx FIFO buffer.
uint32_t SPI_Open(SPI_T *spi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock)
This function make SPI module be ready to transfer. By default, the SPI transfer sequence is MSB firs...
uint32_t SPI_GetBusClock(SPI_T *spi)
Get the actual frequency of SPI bus clock. Only available in Master mode.
void SPI_ClearRxFIFO(SPI_T *spi)
Clear Rx FIFO buffer.