40 uint32_t u32PWMClockSrc;
41 uint32_t u32NearestUnitTimeNsec;
42 uint16_t u16Prescale = 1, u16CNR = 0xFFFF;
58 u32PWMClockSrc /= 1000;
59 for(u16Prescale = 1; u16Prescale <= 0x1000; u16Prescale++)
61 u32NearestUnitTimeNsec = (1000000 * u16Prescale) / u32PWMClockSrc;
62 if(u32NearestUnitTimeNsec < u32UnitTimeNsec)
64 if(u16Prescale == 0x1000)
66 if(!((1000000 * (u16Prescale + 1) > (u32NearestUnitTimeNsec * u32PWMClockSrc))))
78 (pwm)->CTL1 = ((pwm)->CTL1 & ~(
PWM_CTL1_CNTTYPE0_Msk << ((u32ChannelNum >> 1) << 2))) | (1UL << ((u32ChannelNum >> 1) << 2));
82 return (u32NearestUnitTimeNsec);
99 uint32_t u32PWMClockSrc;
101 uint16_t u16Prescale = 1, u16CNR = 0xFFFF;
117 for(u16Prescale = 1; u16Prescale < 0xFFF; u16Prescale++)
119 i = (u32PWMClockSrc / u32Frequency) / u16Prescale;
128 i = u32PWMClockSrc / (u16Prescale * u16CNR);
134 (pwm)->CTL1 = ((pwm)->CTL1 & ~(
PWM_CTL1_CNTTYPE0_Msk << ((u32ChannelNum >> 1) << 2))) | (1UL << ((u32ChannelNum >> 1) << 2));
139 PWM_SET_CMR(pwm, u32ChannelNum, u32DutyCycle * (u16CNR + 1) / 100 - 1);
171 if(u32ChannelMask & (1 << i))
173 (pwm)->CNTEN |= (1UL << ((i >> 1) << 1));
192 if(u32ChannelMask & (1 << i))
194 (pwm)->PERIOD[((i >> 1) << 1)] = 0;
213 if(u32ChannelMask & (1 << i))
215 (pwm)->CNTEN &= ~(1UL << ((i >> 1) << 1));
238 if(u32ChannelNum < 4)
260 if(u32ChannelNum < 4)
326 if(u32ChannelMask & (1 << i))
332 (pwm)->FAILBRK |= (u32BrakeSource & 0xF);
336 *(__IO uint32_t *)(&((pwm)->BRKCTL0_1) + (i >> 1)) |= u32BrakeSource;
340 if(u32LevelMask & (1 << i))
386 (pwm)->CAPINEN |= u32ChannelMask;
387 (pwm)->CAPCTL |= u32ChannelMask;
401 (pwm)->CAPINEN &= ~u32ChannelMask;
402 (pwm)->CAPCTL &= ~u32ChannelMask;
416 (pwm)->POEN |= u32ChannelMask;
430 (pwm)->POEN &= ~u32ChannelMask;
447 *(__IO uint32_t *)(&((pwm)->DTCTL0_1) + (u32ChannelNum >> 1)) &= ~PWM_DTCTL0_1_DTCNT_Msk;
448 *(__IO uint32_t *)(&((pwm)->DTCTL0_1) + (u32ChannelNum >> 1)) |=
PWM_DTCTL0_1_DTEN_Msk | u32Duration;
463 *(__IO uint32_t *)(&((pwm)->DTCTL0_1) + (u32ChannelNum >> 1)) &= ~PWM_DTCTL0_1_DTEN_Msk;
479 (pwm)->CAPIEN |= (u32Edge << u32ChannelNum);
495 (pwm)->CAPIEN &= ~(u32Edge << u32ChannelNum);
511 (pwm)->CAPIF = (u32Edge << u32ChannelNum);
543 (pwm)->INTEN0 |= (u32IntDutyType << u32ChannelNum);
600 (pwm)->CTL0 |= (u32LoadMode << u32ChannelNum);
616 (pwm)->CTL0 &= ~(u32LoadMode << u32ChannelNum);
633 (pwm)->INTEN1 |= (0x7 << u32BrakeSource);
651 (pwm)->INTEN1 &= ~(0x7 << u32BrakeSource);
668 (pwm)->INTSTS1 = (0x3f << u32BrakeSource);
685 return (((pwm)->INTSTS1 & (0x3f << u32BrakeSource)) ? 1 : 0);
NANO103 peripheral access layer header file. This file contains all the peripheral register's definit...
#define PWM_INTEN0_PIEN0_Msk
#define PWM_BNF_BRK1FEN_Pos
#define PWM_INTEN0_ZIEN0_Msk
#define PWM_INTSTS0_CMPDIFn_Pos
#define PWM_CLKSRC_ECLKSRC0_Msk
#define PWM_BRKCTL0_1_BRKAODD_Pos
#define PWM_BNF_BRK0FCS_Pos
#define PWM_WGCTL0_ZPCTLn_Pos
#define PWM_STATUS_ADCTRGn_Pos
#define PWM_BRKCTL0_1_BRKAEVEN_Pos
#define PWM_INTSTS0_ZIF0_Msk
#define PWM_ADCTS0_TRGSEL0_Msk
#define PWM_ADCTS1_TRGSEL4_Msk
#define PWM_BRKCTL0_1_SYSLEN_Msk
#define PWM_WGCTL0_PRDPCTLn_Pos
#define PWM_STATUS_CNTMAX0_Msk
#define PWM_WGCTL1_CMPDCTLn_Pos
#define PWM_BNF_BK0SRC_Pos
#define PWM_BNF_BRK0FCNT_Pos
#define PWM_CLKSRC_ECLKSRC2_Pos
#define PWM_INTSTS0_CMPUIFn_Pos
#define PWM_BRKCTL0_1_SYSEEN_Msk
#define PWM_CTL1_CNTTYPE0_Msk
#define PWM_BRKCTL0_1_BRKAODD_Msk
#define PWM_BNF_BRK0FEN_Msk
#define PWM_INTSTS0_PIF0_Msk
#define PWM_ADCTS0_TRGEN0_Msk
#define PWM_BRKCTL0_1_BRKAEVEN_Msk
#define PWM_ADCTS1_TRGEN4_Msk
#define PWM_BNF_BRK0FCNT_Msk
#define PWM_BNF_BK0SRC_Msk
#define PWM_DTCTL0_1_DTEN_Msk
#define PWM_BNF_BRK0PINV_Msk
#define PWM_BNF_BRK0FCS_Msk
uint32_t CLK_GetPLLClockFreq(void)
This function get PLL frequency. The frequency unit is Hz.
#define CLK_CLKSEL1_PWM0SEL_Msk
#define CLK
Pointer to CLK register structure.
#define PWM_CAPTURE_INT_FALLING_LATCH
#define PWM_DUTY_INT_UP_COUNT_MATCH_CMP
#define PWM_WGCTL1_CMPDCTL0_Msk
#define PWM_FB_LEVEL_SYS_COR
#define PWM_FB_EDGE_SYS_COR
#define PWM_WGCTL1_CMPUCTL0_Msk
#define PWM_DUTY_INT_DOWN_COUNT_MATCH_CMP
#define PWM_WGCTL0_ZPCTL0_Msk
#define PWM_FB_EDGE_SYS_BOD
#define PWM_WGCTL0_PRDPCTL0_Msk
#define PWM_CAPTURE_INT_RISING_LATCH
#define PWM_FB_LEVEL_SYS_BOD
void PWM_ClearZeroIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Clear zero interrupt of selected channel.
void PWM_ForceStop(PWM_T *pwm, uint32_t u32ChannelMask)
Stop PWM generation immediately by clear channel enable bit.
void PWM_Stop(PWM_T *pwm, uint32_t u32ChannelMask)
Stop PWM module.
void PWM_EnableCapture(PWM_T *pwm, uint32_t u32ChannelMask)
Enable capture of selected channel(s)
void PWM_EnableDeadZone(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Duration)
Enable Dead zone of selected channel.
void PWM_ClearCaptureIntFlag(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Edge)
Clear capture interrupt of selected channel.
void PWM_ClearADCTriggerFlag(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Condition)
Clear selected channel trigger ADC flag.
void PWM_DisableADCTrigger(PWM_T *pwm, uint32_t u32ChannelNum)
Disable selected channel to trigger ADC.
uint32_t PWM_ConfigCaptureChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32UnitTimeNsec, uint32_t u32CaptureEdge)
Configure PWM capture and get the nearest unit time.
void PWM_EnableBrakeNoiseFilter(PWM_T *pwm, uint32_t u32BrakePinNum, uint32_t u32ClkCnt, uint32_t u32ClkDivSel)
Enable PWM brake noise filter function.
void PWM_DisablePeriodInt(PWM_T *pwm, uint32_t u32ChannelNum)
Disable period interrupt of selected channel.
void PWM_EnableDutyInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32IntDutyType)
Enable duty interrupt of selected channel.
uint32_t PWM_GetFaultBrakeIntFlag(PWM_T *pwm, uint32_t u32BrakeSource)
This function get fault brake interrupt flag of selected source.
void PWM_DisableCaptureInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Edge)
Disable capture interrupt of selected channel.
void PWM_DisableFaultBrakeInt(PWM_T *pwm, uint32_t u32BrakeSource)
This function disable fault brake interrupt.
uint32_t PWM_ConfigOutputChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle)
This function Configure PWM generator and get the nearest frequency in edge aligned auto-reload mode.
void PWM_DisableLoadMode(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32LoadMode)
Disable load mode of selected channel.
void PWM_DisableBrakeNoiseFilter(PWM_T *pwm, uint32_t u32BrakePinNum)
Disable PWM brake noise filter function.
void PWM_SetClockSource(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32ClkSrcSel)
Set PWM clock source.
uint32_t PWM_GetADCTriggerFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Get selected channel trigger ADC flag.
void PWM_DisableCapture(PWM_T *pwm, uint32_t u32ChannelMask)
Disable capture of selected channel(s)
void PWM_ClearWrapAroundFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Clear the time-base counter reached its maximum value flag of selected channel.
uint32_t PWM_GetZeroIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Get zero interrupt of selected channel.
#define PWM_SET_CMR(pwm, u32ChannelNum, u32CMR)
This macro set the comparator of the selected channel.
void PWM_DisableDutyInt(PWM_T *pwm, uint32_t u32ChannelNum)
Disable duty interrupt of selected channel.
void PWM_EnableBrakePinInverse(PWM_T *pwm, uint32_t u32BrakePinNum)
Enable PWM brake pin inverse function.
void PWM_EnableLoadMode(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32LoadMode)
Enable load mode of selected channel.
void PWM_ClearDutyIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Clear duty interrupt flag of selected channel.
#define PWM_SET_CNR(pwm, u32ChannelNum, u32CNR)
This macro set the period of the selected channel.
void PWM_EnablePeriodInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32IntPeriodType)
Enable period interrupt of selected channel.
void PWM_EnableFaultBrake(PWM_T *pwm, uint32_t u32ChannelMask, uint32_t u32LevelMask, uint32_t u32BrakeSource)
This function enable fault brake of selected channel(s)
uint32_t PWM_GetDutyIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Get duty interrupt flag of selected channel.
void PWM_DisableDeadZone(PWM_T *pwm, uint32_t u32ChannelNum)
Disable Dead zone of selected channel.
uint32_t PWM_GetWrapAroundFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Get the time-base counter reached its maximum value flag of selected channel.
void PWM_DisableOutput(PWM_T *pwm, uint32_t u32ChannelMask)
Disables PWM output generation of selected channel(s)
void PWM_SetBrakePinSource(PWM_T *pwm, uint32_t u32BrakePinNum, uint32_t u32SelAnotherModule)
Set PWM brake pin source.
void PWM_ClearFaultBrakeIntFlag(PWM_T *pwm, uint32_t u32BrakeSource)
This function clear fault brake interrupt of selected source.
void PWM_EnableZeroInt(PWM_T *pwm, uint32_t u32ChannelNum)
Enable zero interrupt of selected channel.
#define PWM_SET_PRESCALER(pwm, u32ChannelNum, u32Prescaler)
This macro set the prescaler of the selected channel.
void PWM_Start(PWM_T *pwm, uint32_t u32ChannelMask)
Start PWM module.
void PWM_DisableZeroInt(PWM_T *pwm, uint32_t u32ChannelNum)
Disable zero interrupt of selected channel.
void PWM_DisableBrakePinInverse(PWM_T *pwm, uint32_t u32BrakePinNum)
Disable PWM brake pin inverse function.
void PWM_ClearPeriodIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Clear period interrupt of selected channel.
void PWM_EnableOutput(PWM_T *pwm, uint32_t u32ChannelMask)
Enables PWM output generation of selected channel(s)
void PWM_EnableFaultBrakeInt(PWM_T *pwm, uint32_t u32BrakeSource)
This function enable fault brake interrupt.
uint32_t PWM_GetCaptureIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Get capture interrupt of selected channel.
uint32_t PWM_GetPeriodIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Get period interrupt of selected channel.
void PWM_EnableCaptureInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Edge)
Enable capture interrupt of selected channel.
void PWM_EnableADCTrigger(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Condition)
Enable selected channel to trigger ADC.
__STATIC_INLINE void SYS_LockReg(void)
Enable register write-protection function.
__STATIC_INLINE void SYS_UnlockReg(void)
Disable register write-protection function.
void SystemCoreClockUpdate(void)
Updates the SystemCoreClock with current core Clock retrieved from CPU registers.