NANO100_BSP V3.04.002
The Board Support Package for Nano100BN Series
i2s.h
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1/**************************************************************************/
12#ifndef __I2S_H__
13#define __I2S_H__
14
15#ifdef __cplusplus
16extern "C"
17{
18#endif
19
31#define I2S_DATABIT_8 (0 << I2S_CTRL_WORDWIDTH_Pos)
32#define I2S_DATABIT_16 (1 << I2S_CTRL_WORDWIDTH_Pos)
33#define I2S_DATABIT_24 (2 << I2S_CTRL_WORDWIDTH_Pos)
34#define I2S_DATABIT_32 (3 << I2S_CTRL_WORDWIDTH_Pos)
36/* Audio Format */
37#define I2S_MONO I2S_CTRL_MONO_Msk
38#define I2S_STEREO 0
40/* I2S Data Format */
41#define I2S_FORMAT_MSB I2S_CTRL_FORMAT_Msk
42#define I2S_FORMAT_I2S 0
44/* I2S Interface */
45#define I2S_I2S 0
47/* I2S Operation mode */
48#define I2S_MODE_SLAVE I2S_CTRL_SLAVE_Msk
49#define I2S_MODE_MASTER 0
51/* I2S FIFO Threshold */
52#define I2S_FIFO_TX_LEVEL_WORD_0 0
53#define I2S_FIFO_TX_LEVEL_WORD_1 (1 << I2S_CTRL_TXTH_Pos)
54#define I2S_FIFO_TX_LEVEL_WORD_2 (2 << I2S_CTRL_TXTH_Pos)
55#define I2S_FIFO_TX_LEVEL_WORD_3 (3 << I2S_CTRL_TXTH_Pos)
56#define I2S_FIFO_TX_LEVEL_WORD_4 (4 << I2S_CTRL_TXTH_Pos)
57#define I2S_FIFO_TX_LEVEL_WORD_5 (5 << I2S_CTRL_TXTH_Pos)
58#define I2S_FIFO_TX_LEVEL_WORD_6 (6 << I2S_CTRL_TXTH_Pos)
59#define I2S_FIFO_TX_LEVEL_WORD_7 (7 << I2S_CTRL_TXTH_Pos)
61#define I2S_FIFO_RX_LEVEL_WORD_1 0
62#define I2S_FIFO_RX_LEVEL_WORD_2 (1 << I2S_CTRL_RXTH_Pos)
63#define I2S_FIFO_RX_LEVEL_WORD_3 (2 << I2S_CTRL_RXTH_Pos)
64#define I2S_FIFO_RX_LEVEL_WORD_4 (3 << I2S_CTRL_RXTH_Pos)
65#define I2S_FIFO_RX_LEVEL_WORD_5 (4 << I2S_CTRL_RXTH_Pos)
66#define I2S_FIFO_RX_LEVEL_WORD_6 (5 << I2S_CTRL_RXTH_Pos)
67#define I2S_FIFO_RX_LEVEL_WORD_7 (6 << I2S_CTRL_RXTH_Pos)
68#define I2S_FIFO_RX_LEVEL_WORD_8 (7 << I2S_CTRL_RXTH_Pos)
70/* I2S Record Channel */
71#define I2S_MONO_RIGHT 0
72#define I2S_MONO_LEFT I2S_CTRL_RXLCH_Msk
74/* I2S Channel */
75#define I2S_RIGHT 0
76#define I2S_LEFT 1 /* end of group NANO100_I2S_EXPORTED_CONSTANTS */
79
92static __INLINE void I2S_ENABLE_TX_ZCD(I2S_T *i2s, uint32_t u32ChMask)
93{
94 if(u32ChMask == I2S_RIGHT)
96 else
98}
99
109static __INLINE void I2S_DISABLE_TX_ZCD(I2S_T *i2s, uint32_t u32ChMask)
110{
111 if(u32ChMask == I2S_RIGHT)
112 i2s->CTRL &= ~I2S_CTRL_RCHZCEN_Msk;
113 else
114 i2s->CTRL &= ~I2S_CTRL_LCHZCEN_Msk;
115}
116
123#define I2S_ENABLE_TXDMA(i2s) ( (i2s)->CTRL |= I2S_CTRL_TXDMA_Msk )
124
131#define I2S_DISABLE_TXDMA(i2s) ( (i2s)->CTRL &= ~I2S_CTRL_TXDMA_Msk )
132
139#define I2S_ENABLE_RXDMA(i2s) ( (i2s)->CTRL |= I2S_CTRL_RXDMA_Msk )
140
147#define I2S_DISABLE_RXDMA(i2s) ( (i2s)->CTRL &= ~I2S_CTRL_RXDMA_Msk )
148
155#define I2S_ENABLE_TX(i2s) ( (i2s)->CTRL |= I2S_CTRL_TXEN_Msk )
156
163#define I2S_DISABLE_TX(i2s) ( (i2s)->CTRL &= ~I2S_CTRL_TXEN_Msk )
164
171#define I2S_ENABLE_RX(i2s) ( (i2s)->CTRL |= I2S_CTRL_RXEN_Msk )
172
179#define I2S_DISABLE_RX(i2s) ( (i2s)->CTRL &= ~I2S_CTRL_RXEN_Msk )
180
187#define I2S_ENABLE_TX_MUTE(i2s) ( (i2s)->CTRL |= I2S_CTRL_MUTE_Msk )
188
195#define I2S_DISABLE_TX_MUTE(i2s) ( (i2s)->CTRL &= ~I2S_CTRL_MUTE_Msk )
196
203#define I2S_CLR_TX_FIFO(i2s) ( (i2s)->CTRL |= I2S_CTRL_CLR_TXFIFO_Msk )
204
211#define I2S_CLR_RX_FIFO(i2s) ( (i2s)->CTRL |= I2S_CTRL_CLR_RXFIFO_Msk )
212
222#define I2S_SET_MONO_RX_CHANNEL(i2s, u32Ch) ( u32Ch == I2S_MONO_LEFT ? ((i2s)->CTRL |= I2S_CTRL_RXLCH_Msk) : ((i2s)->CTRL &= ~I2S_CTRL_RXLCH_Msk) )
223
231#define I2S_WRITE_TX_FIFO(i2s, u32Data) ( (i2s)->TXFIFO = u32Data )
232
239#define I2S_READ_RX_FIFO(i2s) ( (i2s)->RXFIFO )
240
248#define I2S_GET_INT_FLAG(i2s, u32Mask) ((i2s)->STATUS & (u32Mask))
249
257#define I2S_CLR_INT_FLAG(i2s, u32Mask) ( (i2s)->STATUS |= (u32Mask) )
258
265#define I2S_GET_TX_FIFO_LEVEL(i2s) ((((i2s)->STATUS & I2S_STATUS_TX_LEVEL_Msk) >> I2S_STATUS_TX_LEVEL_Pos) & 0xF)
266
273#define I2S_GET_RX_FIFO_LEVEL(i2s) ((((i2s)->STATUS & I2S_STATUS_RX_LEVEL_Msk) >> I2S_STATUS_RX_LEVEL_Pos) & 0xF)
274
275uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface);
276void I2S_Close(I2S_T *i2s);
277void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask);
278void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask);
279uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock);
280void I2S_DisableMCLK(I2S_T *i2s);
281void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold);
282 /* end of group NANO100_I2S_EXPORTED_FUNCTIONS */
284
285 /* end of group NANO100_I2S_Driver */
287 /* end of group NANO100_Device_Driver */
289
290#ifdef __cplusplus
291}
292#endif
293
294#endif //__I2S_H__
295
296/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
297
#define I2S_CTRL_LCHZCEN_Msk
#define I2S_CTRL_RCHZCEN_Msk
#define I2S_RIGHT
Definition: i2s.h:75
void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
Configure FIFO threshold setting.
Definition: i2s.c:194
static __INLINE void I2S_ENABLE_TX_ZCD(I2S_T *i2s, uint32_t u32ChMask)
Enable zero cross detect function.
Definition: i2s.h:92
uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface)
This function configures some parameters of I2S interface for general purpose use....
Definition: i2s.c:88
void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
This function disables the interrupt according to the mask parameter.
Definition: i2s.c:142
static __INLINE void I2S_DISABLE_TX_ZCD(I2S_T *i2s, uint32_t u32ChMask)
Disable zero cross detect function.
Definition: i2s.h:109
void I2S_DisableMCLK(I2S_T *i2s)
Disable MCLK .
Definition: i2s.c:181
uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
Enable MCLK .
Definition: i2s.c:153
void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
This function enables the interrupt according to the mask parameter.
Definition: i2s.c:130
void I2S_Close(I2S_T *i2s)
Disable I2S function and I2S clock.
Definition: i2s.c:118
__IO uint32_t CTRL