40 uint32_t u32MasterSlave,
42 uint32_t u32DataWidth,
45 if(u32DataWidth == 32)
48 spi->
CNTRL = u32MasterSlave | (u32DataWidth << SPI_CNTRL_TX_BIT_LEN_Pos) | (u32SPIMode);
61 SYS->IPRSTC2 |= SYS_IPRSTC2_SPI_RST_Msk;
62 SYS->IPRSTC2 &= ~SYS_IPRSTC2_SPI_RST_Msk;
65 CLK->APBCLK &= ~CLK_APBCLK_SPI_EN_Msk;
75 spi->
FIFO_CTL |= SPI_FIFO_CTL_RX_CLR_Msk;
85 spi->
FIFO_CTL |= SPI_FIFO_CTL_TX_CLR_Msk;
95 spi->
SSR &= ~SPI_SSR_AUTOSS_Msk;
107 spi->
SSR |= (u32SSPinMask | u32ActiveLevel) | SPI_SSR_AUTOSS_Msk;
118 uint32_t u32ClkSrc, u32Div = 0;
130 if(u32BusClock != 0 )
132 u32Div = (u32ClkSrc / (2*u32BusClock)) - 1;
133 if(u32Div > SPI_DIVIDER_DIVIDER_Msk)
134 u32Div = SPI_DIVIDER_DIVIDER_Msk;
137 spi->
DIVIDER = (spi->
DIVIDER & ~SPI_DIVIDER_DIVIDER_Msk) | u32Div;
139 return ( u32ClkSrc / ((u32Div + 1) *2) );
151 spi->
FIFO_CTL = (spi->
FIFO_CTL & ~(SPI_FIFO_CTL_TX_THRESHOLD_Msk | SPI_FIFO_CTL_RX_THRESHOLD_Msk) |
152 (u32TxThreshold << SPI_FIFO_CTL_TX_THRESHOLD_Pos) |
153 (u32RxThreshold << SPI_FIFO_CTL_RX_THRESHOLD_Pos));
155 spi->
CNTRL |= SPI_CNTRL_FIFO_Msk;
165 spi->
CNTRL &= ~SPI_CNTRL_FIFO_Msk;
188 spi->
DIVIDER = (spi->
DIVIDER & ~SPI_DIVIDER_DIVIDER_Msk) | u32Div;
190 return (u32ClkSrc / ((u32Div + 1) *2));
206 spi->
CNTRL |= SPI_CNTRL_IE_Msk;
209 spi->
CNTRL2 |= SPI_CNTRL2_SSTA_INTEN_Msk;
212 spi->
FIFO_CTL |= SPI_FIFO_CTL_TX_INTEN_Msk;
215 spi->
FIFO_CTL |= SPI_FIFO_CTL_RX_INTEN_Msk;
218 spi->
FIFO_CTL |= SPI_FIFO_CTL_RXOV_INTEN_Msk;
221 spi->
FIFO_CTL |= SPI_FIFO_CTL_TIMEOUT_INTEN_Msk;
237 spi->
CNTRL &= ~SPI_CNTRL_IE_Msk;
240 spi->
CNTRL2 &= ~SPI_CNTRL2_SSTA_INTEN_Msk;
243 spi->
FIFO_CTL &= ~SPI_FIFO_CTL_TX_INTEN_Msk;
246 spi->
FIFO_CTL &= ~SPI_FIFO_CTL_RX_INTEN_Msk;
249 spi->
FIFO_CTL &= ~SPI_FIFO_CTL_RXOV_INTEN_Msk;
252 spi->
FIFO_CTL &= ~SPI_FIFO_CTL_TIMEOUT_INTEN_Msk;
NUC029FAE peripheral access layer header file. This file contains all the peripheral register's defin...
#define CLK_CLKSEL1_SPI_S_HCLK
uint32_t CLK_GetHCLKFreq(void)
This function get HCLK frequency. The frequency unit is Hz.
uint32_t CLK_GetLXTFreq(void)
This function get external low frequency crystal frequency. The frequency unit is Hz.
uint32_t CLK_GetHXTFreq(void)
This function get external high frequency crystal frequency. The frequency unit is Hz.
#define CLK
Pointer to CLK register structure.
#define SYS
Pointer to SYS register structure.
#define SPI_FIFO_TIMEOUT_INTEN_MASK
#define SPI_FIFO_RX_INTEN_MASK
#define SPI_SSTA_INTEN_MASK
#define SPI_FIFO_TX_INTEN_MASK
#define SPI_FIFO_RXOV_INTEN_MASK
void SPI_DisableInt(SPI_T *spi, uint32_t u32Mask)
Disable FIFO related interrupts specified by u32Mask parameter.
void SPI_DisableFIFO(SPI_T *spi)
Disable FIFO mode.
void SPI_EnableInt(SPI_T *spi, uint32_t u32Mask)
Enable FIFO related interrupts specified by u32Mask parameter.
void SPI_EnableAutoSS(SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
Enable the automatic slave select function. Only available in Master mode.
void SPI_EnableFIFO(SPI_T *spi, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
Enable FIFO mode with user-specified Tx FIFO threshold and Rx FIFO threshold configurations.
void SPI_DisableAutoSS(SPI_T *spi)
Disable the automatic slave select function.
uint32_t SPI_SetBusClock(SPI_T *spi, uint32_t u32BusClock)
Set the SPI bus clock. Only available in Master mode.
void SPI_Close(SPI_T *spi)
Reset SPI module and disable SPI peripheral clock.
void SPI_ClearTxFIFO(SPI_T *spi)
Clear Tx FIFO buffer.
uint32_t SPI_Open(SPI_T *spi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock)
This function make SPI module be ready to transfer. By default, the SPI transfer sequence is MSB firs...
uint32_t SPI_GetBusClock(SPI_T *spi)
Get the actual frequency of SPI bus clock. Only available in Master mode.
void SPI_ClearRxFIFO(SPI_T *spi)
Clear Rx FIFO buffer.