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MINI58_BSP V3.01.005
The Board Support Package for Mini58 Series MCU
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Modules | |
CLK Exported Functions | |
#define CLK_CLKDIV_ADC | ( | x | ) | (((x)-1) << 16) |
#define CLK_CLKDIV_HCLK | ( | x | ) | ((x)-1) |
#define CLK_CLKDIV_UART | ( | x | ) | (((x)-1) << 8) |
#define CLK_CLKSEL0_HCLKSEL_HIRC 0x07UL |
#define CLK_CLKSEL0_HCLKSEL_HXT 0x00UL |
#define CLK_CLKSEL0_HCLKSEL_LIRC 0x03UL |
#define CLK_CLKSEL0_HCLKSEL_LXT 0x00UL |
#define CLK_CLKSEL0_HCLKSEL_PLL 0x02UL |
#define CLK_CLKSEL0_HCLKSEL_XTAL 0x00UL |
#define CLK_CLKSEL0_STCLKSEL_HCLK 0x08UL |
#define CLK_CLKSEL0_STCLKSEL_HCLK_DIV2 0x18UL |
#define CLK_CLKSEL0_STCLKSEL_HIRC_DIV2 0x38UL |
#define CLK_CLKSEL0_STCLKSEL_XTAL 0x00UL |
#define CLK_CLKSEL0_STCLKSEL_XTAL_DIV2 0x10UL |
#define CLK_CLKSEL1_ADCSEL_HCLK 0x00000008UL |
#define CLK_CLKSEL1_ADCSEL_HIRC 0x0000000CUL |
#define CLK_CLKSEL1_ADCSEL_PLL 0x00000004UL |
#define CLK_CLKSEL1_ADCSEL_XTAL 0x00000000UL |
#define CLK_CLKSEL1_PWMCH01SEL_HCLK 0x20000000UL |
#define CLK_CLKSEL1_PWMCH23SEL_HCLK 0x80000000UL |
#define CLK_CLKSEL1_SPISEL_HCLK 0x00000010UL |
#define CLK_CLKSEL1_SPISEL_PLL 0x00000020UL |
#define CLK_CLKSEL1_SPISEL_XTAL 0x00000000UL |
#define CLK_CLKSEL1_TMR0SEL_HCLK 0x00000200UL |
#define CLK_CLKSEL1_TMR0SEL_HIRC 0x00000700UL |
#define CLK_CLKSEL1_TMR0SEL_LIRC 0x00000100UL |
#define CLK_CLKSEL1_TMR0SEL_TM0 0x00000300UL |
#define CLK_CLKSEL1_TMR0SEL_XTAL 0x00000000UL |
#define CLK_CLKSEL1_TMR1SEL_HCLK 0x00002000UL |
#define CLK_CLKSEL1_TMR1SEL_HIRC 0x00007000UL |
#define CLK_CLKSEL1_TMR1SEL_LIRC 0x00001000UL |
#define CLK_CLKSEL1_TMR1SEL_TM1 0x00003000UL |
#define CLK_CLKSEL1_TMR1SEL_XTAL 0x00000000UL |
#define CLK_CLKSEL1_UARTSEL_HIRC 0x02000000UL |
#define CLK_CLKSEL1_UARTSEL_PLL 0x01000000UL |
#define CLK_CLKSEL1_UARTSEL_XTAL 0x00000000UL |
#define CLK_CLKSEL1_WDTSEL_HCLK_DIV2048 0x00000002UL |
#define CLK_CLKSEL1_WDTSEL_IRC10K 0x00000003UL |
#define CLK_CLKSEL1_WDTSEL_LIRC 0x00000003UL |
#define CLK_CLKSEL1_WDTSEL_XTAL 0x00000000UL |
#define CLK_CLKSEL2_CLKOSEL_HCLK 0x00000008UL |
#define CLK_CLKSEL2_CLKOSEL_HIRC 0x0000000CUL |
#define CLK_CLKSEL2_CLKOSEL_HXT 0x00000000UL |
#define CLK_CLKSEL2_CLKOSEL_LIRC 0x00000004UL |
#define CLK_CLKSEL2_CLKOSEL_LXT 0x00000000UL |
#define CLK_CLKSEL2_CLKOSEL_XTAL 0x00000000UL |
#define CLK_CLKSEL2_PWMCH45SEL_HCLK 0x00000020UL |
#define CLK_CLKSEL2_WWDTSEL_HCLK_DIV2048 0x00020000UL |
#define CLK_CLKSEL2_WWDTSEL_LIRC 0x00030000UL |
#define CLK_PLLCTL_100MHz_HIRC (CLK_PLLCTL_PLLSRC_HIRC | CLK_PLLCTL_NR(4) | CLK_PLLCTL_NF( 36) | CLK_PLLCTL_NO_2) |
#define CLK_PLLCTL_100MHz_HXT (CLK_PLLCTL_PLLSRC_HXT | CLK_PLLCTL_NR(3) | CLK_PLLCTL_NF( 50) | CLK_PLLCTL_NO_2) |
#define CLK_PLLCTL_72MHz_HIRC (CLK_PLLCTL_PLLSRC_HIRC | CLK_PLLCTL_NR(4) | CLK_PLLCTL_NF( 26) | CLK_PLLCTL_NO_2) |
#define CLK_PLLCTL_72MHz_HXT (CLK_PLLCTL_PLLSRC_HXT | CLK_PLLCTL_NR(2) | CLK_PLLCTL_NF( 24) | CLK_PLLCTL_NO_2) |
#define CLK_PLLCTL_96MHz_HIRC (CLK_PLLCTL_PLLSRC_HIRC | CLK_PLLCTL_NR(13)| CLK_PLLCTL_NF(113) | CLK_PLLCTL_NO_2) |
#define CLK_PLLCTL_96MHz_HXT (CLK_PLLCTL_PLLSRC_HXT | CLK_PLLCTL_NR(2) | CLK_PLLCTL_NF( 32) | CLK_PLLCTL_NO_2) |
#define CLK_PLLCTL_NF | ( | x | ) | ((x)-2) |
#define CLK_PLLCTL_NR | ( | x | ) | (((x)-2)<<9) |
#define CLK_PLLCTL_PLLSRC_HIRC 0x00080000UL |
#define CLK_PLLCTL_PLLSRC_HXT 0x00000000UL |
#define CLK_PWRCTL_XTL12M 0x01UL |
#define CLK_PWRCTL_XTL32K 0x02UL |
#define CLK_PWRCTL_XTLEN_HXT 0x01UL |
#define CLK_PWRCTL_XTLEN_LXT 0x02UL |
#define MODULE_APBCLK | ( | x | ) | ((x >>31) & 0x1) |
#define MODULE_APBCLK_ENC | ( | x | ) | (((x) & 0x01) << 31) |
#define MODULE_CLKDIV | ( | x | ) | ((x >>18) & 0x3) |
#define MODULE_CLKDIV_ENC | ( | x | ) | (((x) & 0x03) << 18) |
#define MODULE_CLKDIV_Msk | ( | x | ) | ((x >>10) & 0xff) |
#define MODULE_CLKDIV_Msk_ENC | ( | x | ) | (((x) & 0xff) << 10) |
#define MODULE_CLKDIV_Pos | ( | x | ) | ((x >>5 ) & 0x1f) |
#define MODULE_CLKDIV_Pos_ENC | ( | x | ) | (((x) & 0x1f) << 5) |
#define MODULE_CLKSEL | ( | x | ) | ((x >>29) & 0x3) |
#define MODULE_CLKSEL_ENC | ( | x | ) | (((x) & 0x03) << 29) |
#define MODULE_CLKSEL_Msk | ( | x | ) | ((x >>25) & 0xf) |
#define MODULE_CLKSEL_Msk_ENC | ( | x | ) | (((x) & 0x0f) << 25) |
#define MODULE_CLKSEL_Pos | ( | x | ) | ((x >>20) & 0x1f) |
#define MODULE_CLKSEL_Pos_ENC | ( | x | ) | (((x) & 0x1f) << 20) |
#define MODULE_IP_EN_Pos | ( | x | ) | ((x >>0 ) & 0x1f) |
#define MODULE_IP_EN_Pos_ENC | ( | x | ) | (((x) & 0x1f) << 0) |
#define NA MODULE_NoMsk |